Bit Stream Aliasing for Memory Data Reliability
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Solution Overview
Problem
Conventional memory devices assume no transmission errors during data transfer from memory to the error correction code (ECC) decoder, leading to potential operational failures due to increased error likelihood in faster, smaller, or longer data transmission channels.
Innovation Solution
A system with an aliasing module that transforms a bit stream into a more reliable alias before transmission and a de-aliasing module that reverses this transformation upon receipt, ensuring accurate data processing by the ECC decoder.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the data transmission channel is made faster, smaller, and/or longer to improve productivity and miniaturization, then the transmission speed and device size are improved, but the potential for data errors during transmission increases
Solution Approach 1:
The patent applies preliminary action by transforming the bit stream into an aliased form before transmission. The aliasing module pre-processes the data by mapping it to an aliased bit stream that is more resistant to transmission errors. This preliminary transformation occurs at the sender end before the data enters the transmission channel, allowing the system to benefit from faster transmission while maintaining reliability through the error-resistant aliased representation.
Solution Approach 2:
The patent introduces an intermediary approach by using an aliased bit stream as a mediator between the original bit stream and the ECC decoder. The aliasing module transforms the original bit stream into an aliased version that serves as an intermediate representation, which is then transmitted over the channel and subsequently de-aliased by the de-aliasing module before reaching the ECC decoder. This intermediary aliased form provides error resistance during transmission.
2Device complexity
If conventional ECC decoding is used without aliasing, then the device complexity is low, but operational failures occur due to transmission errors in the bit stream
Solution Approach 1:
The patent applies segmentation by dividing the decoding system into distinct functional modules: an aliasing module that transforms the bit stream before transmission, a de-aliasing module that reverses the transformation after reception, and the ECC decoder that processes the final data. This modular segmentation allows each component to perform its specific function independently, managing complexity while improving reliability through the coordinated operation of these segments.
Solution Approach 2:
The patent uses an intermediary aliased bit stream that bridges the gap between the original data and the ECC decoding process. The aliasing and de-aliasing modules act as intermediaries that prepare the data for transmission and reception, respectively. This intermediary layer protects the ECC decoder from transmission errors by ensuring the data entering the decoder has been pre-protected through the aliasing transformation.
3Reliability
If bit stream aliasing is implemented to improve data reliability, then transmission error resistance is improved, but the device complexity increases due to additional aliasing and de-aliasing modules
Solution Approach 1:
The patent applies universality by designing the aliasing and de-aliasing modules to handle multiple aspects of data protection. These modules not only transform the bit stream but also work in conjunction with the ECC decoding process, serving multiple functions: error resistance during transmission, compatibility with existing ECC decoders, and maintenance of data integrity. This multi-functionality justifies the added complexity by providing comprehensive protection against transmission errors.
Data Source
AI summary
An aliasing module is defined and connected to receive a first bit stream to be transmitted over a data bus from a memory to an external controller of the memory. The aliasing module is defined and connected to alias the first bit stream as a second bit stream and transmit the second bit stream over the data bus in lieu of the first bit stream. A de-aliasing module is defined and connected to receive the second bit stream from the data bus at the external controller. The de-aliasing module is defined and connected to de-alias the received second bit stream back to the first bit stream and provide the first bit stream to the external controller for processing.


