Bit Stuffing PWM for Bootstrap Capacitor Reduction
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Solution Overview
Problem
Switched-mode power supplies face challenges in maintaining bootstrap voltage during high-frequency operations, requiring large capacitors that increase size and cost, and previous solutions either allow excessive inrush currents or reduce output power to mitigate this.
Innovation Solution
Implementing bit stuffing pulse width modulation techniques that digitally detect inactivity in PWM signals and insert small charge pulses at a low repetition rate, allowing a significant reduction in bootstrap capacitor size while preserving output power by maintaining the bootstrap voltage with minimal duty cycle loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large bootstrap capacitors are used to maintain voltage during high-frequency operations, then the bootstrap voltage stability is improved, but the device size and cost increase
Solution Approach 1:
The patent applies periodic action by inserting small charge pulses at a low repetition rate (bit stuffing technique) rather than using continuous large capacitor charging. The pulse generator injects periodic charge pulses into the PWM signal during minimum duty cycle periods, providing just enough charge to maintain bootstrap voltage without requiring large capacitor size. This transforms the continuous charging requirement into periodic top-up pulses.
Solution Approach 2:
The patent changes the operating parameters by operating the H-bridge switch at minimum duty cycle periods to create opportunities for bootstrap capacitor recharging. By controlling the duty cycle parameter and detecting when the switch remains in one state for predetermined time periods, the system creates windows for injecting charge pulses, thereby maintaining voltage stability with smaller capacitance values.
2Object-affected harmful factors
If previous solutions are used to mitigate inrush currents, then the current spikes are reduced, but output power is reduced
Solution Approach 1:
The patent applies partial action by injecting only small charge pulses at minimum duty cycle periods rather than continuously charging the bootstrap capacitor. This partial charging approach is sufficient to maintain voltage stability without causing excessive inrush currents, while preserving full output power capability during normal operation. The charge injection is just enough to compensate for leakage and maintain voltage.
Solution Approach 2:
The patent performs preliminary action by proactively injecting charge pulses during minimum duty cycle periods before the bootstrap voltage drops below operational thresholds. The pulse generator detects when the H-bridge switch has been in one state for a predetermined time and preemptively charges the bootstrap capacitor, preventing voltage collapse and ensuring continuous operation without power reduction.
3Loss of energy
If the H-bridge switch operates at high frequency, then the efficiency is improved, but the bootstrap voltage maintenance becomes difficult
Solution Approach 1:
The patent implements feedback by using a pulse generator that monitors the H-bridge switch state and detects when the switch remains in one state for a predetermined time period. This feedback mechanism identifies minimum duty cycle conditions and triggers charge pulse injection accordingly, dynamically adapting to switching conditions to maintain bootstrap voltage regardless of switching frequency variations.
Solution Approach 2:
The patent introduces an intermediary pulse generator that mediates between the high-frequency switching operation and the bootstrap capacitor charging requirement. Rather than directly charging the capacitor at every switching cycle, the pulse generator acts as an intermediary, injecting charge only when needed during minimum duty cycle periods, thus decoupling the high-frequency switching from the capacitor charging process.
Data Source
AI summary
Systems and methods for bit stuffing pulse width modulation are provided. Example embodiments of the systems and methods of bit stuffing pulse width modulation disclosed herein may allow for a significant reduction in the size of the bootstrap capacitor while giving up only a small percentage of output drive, and reduce die space. Included in such systems and methods is the ability to digitally detect inactivity on the PMW signals for a class D power amplifier, and to digitally insert small charge pulses at a fairly low repetition rate relative to the normal switching frequency. The low repetition rate may preserve the maximum output power while still allowing enough charge to transfer to the bootstrap capacitor.