Bitline Air-Gap Structure for Reduced Capacitive Coupling
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Solution Overview
Problem
As electronic devices are designed to increase integration density by reducing feature dimensions and spacing, the capacitive coupling between adjacent bitlines increases, necessitating the formation of air gaps to mitigate this effect.
Innovation Solution
The electronic device incorporates air gaps adjacent to bitlines, with the air gaps extending above and optionally below the bitlines, exhibiting a greater height than the bitlines and featuring sloped sidewalls, which reduces bitline-bitline capacitance without adding complex process steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If feature dimensions and spacing are reduced to increase integration density, then integration density is improved, but capacitive coupling between adjacent bitlines increases
Solution Approach 1:
An air gap structure is introduced as an intermediary element between adjacent bitlines. The air gap acts as a mediator that reduces capacitive coupling while allowing the bitlines to maintain reduced spacing for high integration density. The air gap material (air or vacuum) provides electrical isolation between the conductive bitlines, thereby reducing parasitic capacitance without requiring increased physical separation.
Solution Approach 2:
The air gap structure is applied locally at specific positions between adjacent bitlines rather than uniformly across the entire device. The air gap height is optimized locally to achieve the desired capacitance reduction while maintaining overall device performance. This localized approach allows integration density to be maximized in regions where air gaps are not required.
2Object-affected harmful factors
If air gaps are formed between adjacent bitlines to reduce capacitance, then capacitive coupling is reduced, but device complexity increases
Solution Approach 1:
The air gap formation process is merged with existing fabrication steps in the bitline manufacturing process. The air gaps are formed as part of the bitline patterning and deposition sequence, rather than as a separate, additional process. This integration of the air gap formation into the standard bitline fabrication flow minimizes the increase in device complexity while achieving the desired capacitance reduction.
3Quantity of substance
If bitline dimensions are reduced to increase integration density, then integration density is improved, but programming time increases
Solution Approach 1:
The air gap structure serves as an intermediary that reduces capacitive coupling between closely spaced bitlines. By reducing the parasitic capacitance, the air gap enables faster signal transitions and reduces the time required for programming operations, thereby offsetting the time penalty associated with reduced bitline dimensions and maintaining high integration density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves reduced capacitance between adjacent bitlines, improving electrical performance by decreasing programming time and increasing processing speed, while maintaining resistance and small bitline dimensions.
Implementation Method 1
the capacitive coupling between adjacent bitlines increases. Air gaps have been formed between adjacent bitlines to reduce bitline to bitline coupling
Data Source
AI summary
An electronic device that comprises bitlines and air gaps adjacent to an array region of an electronic device is disclosed. The bitlines comprise sloped sidewalls and a height of the air gaps is greater than a height of the bitlines. Additional electronic devices are disclosed, as are methods of forming an electronic device and related systems.