Bitline Isolation Circuit for Low Voltage Memory Readout
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Solution Overview
Problem
Current semiconductor memory devices face challenges in efficiently sensing and amplifying voltage differences on bitline pairs, particularly at low voltage levels, which affects data readout operations and increases power consumption.
Innovation Solution
A semiconductor memory device and data read method that include a first and second bitline pair equalized to different voltage levels by respective equalizer circuits, with an isolation circuit and sense amplifier configured to connect or isolate the bitlines, allowing the sense amplifier to sense and amplify voltage differences, even at low voltage levels, thereby minimizing power consumption during readout operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the sense amplifier senses voltage difference on the bitline pair without isolation, then the sensing operation can be performed, but power consumption increases due to unnecessary equalization operations
Solution Approach 1:
An isolation circuit is introduced as an intermediary component between the first and second bitline pairs. This isolation circuit includes isolation transistors that control the connection between the bitline pairs, allowing the sense amplifier to operate independently on the second bitline pair without being affected by the first bitline pair's equalization operations, thereby reducing power consumption while maintaining sensing functionality
Solution Approach 2:
The bitline structure is divided into two separate pairs (first bitline pair and second bitline pair) that can be independently controlled. The sense amplifier is connected only to the second bitline pair, and the isolation circuit enables selective connection between the pairs, allowing independent operation and reducing unnecessary power consumption during sensing operations
2Measurement precision
If the sense amplifier is connected to both bitline pairs, then data can be read, but the sensing precision is reduced due to voltage interference from the first bitline pair
Solution Approach 1:
The isolation circuit acts as a mediator that selectively connects or disconnects the first bitline pair from the second bitline pair. During sensing operations, the isolation circuit ensures that only the second bitline pair is connected to the sense amplifier, eliminating voltage interference from the first bitline pair and improving sensing precision while maintaining ease of operation through automated isolation control
Solution Approach 2:
The isolation is applied locally at the connection points between the first and second bitline pairs using isolation transistors. This local isolation ensures that the voltage difference sensing on the second bitline pair is not affected by the first bitline pair, improving measurement precision without complicating the overall data readout operation
3Productivity
If voltage equalization is performed on both bitline pairs simultaneously, then both can be prepared for sensing, but power consumption increases
Solution Approach 1:
The first bitline pair is equalized to a first voltage level in advance before the sensing operation on the second bitline pair. The isolation circuit ensures that this preliminary equalization of the first bitline pair does not interfere with the sensing operation on the second bitline pair, allowing efficient power usage by performing equalization only when needed and isolating it from the active sensing operation
Solution Approach 2:
The isolation circuit serves as a mediator that prevents power consumption from the first bitline pair's equalization operation from affecting the second bitline pair's sensing operation. This allows independent voltage equalization of the first bitline pair without unnecessary power consumption during the sensing phase
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables normal data readout operations even at low voltage levels, reducing power consumption by effectively isolating and connecting bitline pairs during sensing, thus improving the efficiency of data retrieval in semiconductor memory devices.
Implementation Method 1
a sense amplifier electrically connected to the second bitline pair, the sense amplifier configured to sense a voltage difference of the second bitline pair
Implementation Method 2
an isolation circuit disposed between the first bitline pair and the second bitline pair, the isolation unit configured to electrically connect or isolate the first bitline pair to or from the second bitline pair
Implementation Method 3
a first bitline pair equalized to a first voltage level by a first equalizer circuit, a second bitline pair equalized to a second voltage level by a second equalizer circuit
Data Source
AI summary
A semiconductor memory device includes a first bitline pair equalized to a first voltage level by a first equalizer circuit, a second bitline pair equalized to a second voltage level by a second equalizer circuit, an isolation circuit disposed between the first bitline pair and the second bitline pair, the isolation unit configured to electrically connect or isolate the first bitline pair to or from the second bitline pair, and a sense amplifier electrically connected to the second bitline pair, the sense amplifier configured to sense a voltage difference of the second bitline pair, wherein the isolation circuit isolates one of the connections between the first bitline pair and the second bitline pair while the sense amplifier senses the voltage difference of the second bitline pair.