Bitline Structure Layout for Low-Leakage Contact Resistance
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Solution Overview
Problem
The existing semiconductor structures face issues with electric leakage and increased contact resistance due to the narrow width of bitlines in contact holes, which affects the quality of the semiconductor structure.
Innovation Solution
A method is developed to manufacture semiconductor structures where the bitline in the contact hole has a width greater than outside the contact hole, achieved by forming a non-metal conductive layer with a first opening and a metal conductive layer using atomic layer deposition, and etching these layers to form a bitline structure, thereby increasing the contact area and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the bitline width in the bitline contact hole is reduced to mitigate electric leakage, then electric leakage between bitlines is reduced, but the contact resistance between the bitline and active region increases
Solution Approach 1:
The patent applies local quality by creating different bitline widths at different locations: a first bitline width in the bitline contact hole region and a second bitline width outside the bitline contact hole. This allows the bitline to have a narrower width where electric leakage is a concern (in the contact hole) while maintaining a wider width where low contact resistance is needed (outside the contact hole), thus resolving the contradiction between reducing electric leakage and maintaining low contact resistance.
2Reliability
If the bitline width on the substrate surface is increased to reduce contact resistance, then contact resistance decreases, but the occupation of node contact window space increases
Solution Approach 1:
The patent uses local quality to vary the bitline width based on location: wider bitline width outside the bitline contact hole to reduce contact resistance, and narrower bitline width within the bitline contact hole to free up space for the node contact window. This spatial variation in dimensions allows both low contact resistance and adequate node contact window space to be achieved simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces node and bitline contact resistances, improving the overall quality of the semiconductor structure by increasing the contact area between the bitline and the active region.
Implementation Method 1
forming a metal conductive layer, with which a surface of the non-metal conductive layer is covered
Data Source
AI summary
The present application relates to a semiconductor structure and a method of manufacturing the same. The method includes: providing a substrate; forming a bitline contact hole located in the substrate, and a non-metal conductive layer with which a surface of the substrate is covered and the bitline contact hole is filled, the non-metal conductive layer provided with a first opening therein, the first opening aligned with the bitline contact hole; forming a metal conductive layer, with which a surface of the non-metal conductive layer is covered; forming an insulation layer, with which a surface of the metal conductive layer surface is covered; and etching the insulation layer, the metal conductive layer, and the non-metal conductive layer to form a bitline structure.