Bitline Sense Amplifier Voltage Control for DRAM Noise Reduction

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Solution Overview

Problem

Noise occurring at memory cells not targeted for sensing in dynamic random access memory (DRAM) due to bitline sense amplifiers can cause errors, reducing the reliability of the memory device.

Innovation Solution

A memory device with a bitline sense amplifier and a sense amplifier driver circuit that adjusts the bitline low-level voltage based on commands from a host, generating pull-up and pull-down pulses to manage voltage levels during read and write operations, ensuring the bitline voltage is higher than ground during read operations and equal to ground during write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the bitline sense amplifier operates at ground voltage level, then the sensing operation can be performed, but noise occurs at non-targeted memory cells causing data errors

Engineering Contradiction:

Improvedata accuracyVSAvoidnoise at non-targeted memory cells

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the voltage parameter of the bitline sense amplifier from ground level (0V) to a higher voltage level (e.g., 0.3V to 0.7V). This parameter change eliminates the noise effect at non-targeted memory cells while preserving the sensing capability, as the elevated voltage maintains the reverse-biased PN junction condition without causing GIDL phenomena.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the bitline sense amplifier uses elevated voltage to prevent noise, then reliability improves, but additional voltage control circuitry is required

Engineering Contradiction:

Improvememory operation reliabilityVSAvoidvoltage control circuitry

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The sense amplifier driver circuit is designed to perform multiple functions: it generates the elevated voltage for the bitline sense amplifier during read operations, and generates the ground voltage during write operations. This multi-functional design prevents noise issues while avoiding the need for separate dedicated voltage control circuits, thus managing device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If the bitline voltage is maintained above ground during read operations, then leakage current is reduced, but power consumption increases

Engineering Contradiction:

Improvedata retentionVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The bitline sense amplifier voltage is dynamically switched between elevated level during read operations and ground level during write operations. This periodic voltage adjustment reduces leakage current and prevents data loss during reads, while minimizing power consumption by returning to ground level when reads are not performed.

Inventive Principle:

Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces leakage current and prevents data loss in memory cells, enhancing the reliability of the memory device by maintaining a reverse-biased PN junction and minimizing GIDL phenomena.

Implementation Method 1

The bitline sense amplifier may sense a voltage difference between the bitline and the complementary bitline and may amplify the sensed voltage difference

Methodology Applied

Scientific EffectVoltage difference sensing: Electric Field

Implementation Method 2

The sense amplifier driver circuit may generate a first pull-up pulse and a pull-down pulse based on a command received from a host and may adjust a level of a bitline low voltage

Methodology Applied

Scientific EffectPulse generation:

Implementation Method 3

Each of the plurality of memory cells may include a transistor of a floating body structure

Methodology Applied

Scientific EffectGIDL (Gate Induced Drain Leakage):

Implementation Method 4

maintaining a reverse-biased PN junction and minimizing GIDL phenomena

Methodology Applied

Scientific EffectPN junction reverse bias: Diode

Data Source

PatentUS11495284B2Memory device including bitline sense amplifier and operating method thereof

Publication Date: 2022.11.08 SAMSUNG ELECTRONICS CO LTD

AI summary

Disclosed are a memory device and an operating method thereof. The memory device includes a bitline sense amplifier connected to a bitline and a complementary bitline connected to a memory cell, and a sense amplifier driver circuit. The bitline sense amplifier senses and amplifies a voltage difference by developing a voltage of the bitline and a voltage of the complementary bitline. The sense amplifier driver circuit includes a pull-up circuit adjusting a level of a bitline low-level voltage developed by the bitline sense amplifier to be higher than a ground voltage in response to a first pull-up pulse, and a pull-down circuit adjusting the level of the bitline low level adjusted by the pull-up circuit to be equal to the ground voltage in response to a pull-down pulse. A pulse generator generates the first pull-up pulse and the pull-down pulse based on a command received from a host.