Bitmap Logical-to-Physical Mapping for SRAM-Limited Memory

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Solution Overview

Problem

Conventional memory systems face inefficiencies due to large logical to physical (L2P) tables that increase latency and overprovisioning penalties, especially in mobile devices with limited static random-access memory (SRAM) space, and zoned storage architectures that result in reduced performance and storage space.

Innovation Solution

Mapping logical memory addresses to physical addresses using bitmaps, allowing data from multiple zones to be stored in a single superblock, reducing the need for open superblocks and minimizing the size of L2P tables, thereby optimizing SRAM usage and reducing overprovisioning penalties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If conventional L2P tables are used for address mapping, then complete address mapping functionality is achieved, but SRAM space is excessively consumed and latency increases

Engineering Contradiction:

Improveaddress mapping latencyVSAvoidSRAM space consumption

Core Design Contradiction:

Loss of timeVSQuantity of substance

Solution Approach 1:

The patent segments the L2P table into multiple smaller tables organized hierarchically. Instead of using one large L2P table that consumes excessive SRAM, the address mapping functionality is divided into multiple smaller tables that can be stored in limited SRAM space, reducing both latency and space consumption simultaneously

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical dimension to the L2P table structure by organizing tables in levels (e.g., root table pointing to child tables). This dimensional change allows the system to map addresses through multiple smaller tables rather than requiring a single large table, optimizing the trade-off between SRAM usage and mapping latency

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Stability of the object's composition

If zoned storage architecture is implemented, then storage organization is improved, but performance and storage space utilization deteriorate

Engineering Contradiction:

Improvestorage organizationVSAvoidstorage performance

Core Design Contradiction:

Stability of the object's compositionVSProductivity

Solution Approach 1:

The patent merges data from multiple zones into a single superblock structure. Instead of maintaining separate storage structures for each zone that reduce performance, the system combines zone data into unified superblocks while using the hierarchical L2P tables to manage the mappings, thereby improving both storage organization and performance simultaneously

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS20250291717A1Logical to physical memory address mapping using bitmaps

Publication Date: 2025.09.18 MICRON TECHNOLOGY INC

AI summary

Methods, systems, and apparatuses include receiving, from a host device, a memory command for a memory device, the memory command including a logical address of the memory device and a zone identifier. A logical zone start address is determined using the zone identifier. A zone offset is determined as a difference of the logical address and the logical zone start address. A bitmap is retrieved using the zone identifier. A physical address is determined using the bitmap and the zone offset. The memory command is executed on the memory device using the physical address.