Bitmap Register for Multi-Channel Update Detection

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Solution Overview

Problem

Current computing systems face inefficiencies in determining which registers have been updated between a host system and an adapter, often relying on time-consuming interrupts or resource-intensive polling, especially when dealing with multiple channels.

Innovation Solution

Implementing an interface logic that updates a bitmap value associated with a packet location, allowing the processor to determine register updates without continuous polling or interrupts, by writing a same value read by the processor to clear the bitmap value and process packets efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interrupts are used to determine register updates, then the adapter processor can be notified of updates, but the process becomes time-consuming and disruptive

Engineering Contradiction:
Improveregister update detectionVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

A bitmap register is introduced as an intermediary between the channel registers and the adapter processor. The bitmap register acts as a mediator that consolidates update status from multiple channel registers into a single structure, allowing the processor to efficiently determine which channels require processing without direct interrupts from each register.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Multiple channel register update statuses are merged into a single bitmap register. Instead of having separate interrupt mechanisms for each channel register, the system combines all update indications into one bitmap structure that the processor can check in a unified manner, reducing the overall overhead of update detection.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If polling is used to determine register updates, then the adapter processor can identify updated registers, but computing resources are consumed especially with large numbers of registers

Engineering Contradiction:
Improveregister update detectionVSAvoidcomputing resource consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system segments the monitoring task by dividing it into two parts: the bitmap register that continuously tracks update status (maintained by interface logic) and the processor that only needs to check the consolidated bitmap when needed. This segmentation eliminates the need for the processor to continuously poll each individual channel register, significantly reducing computational overhead.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interface logic performs preliminary action by maintaining the bitmap register and updating it whenever channel registers change. This preliminary tracking of update status means that when the processor needs information, the data is already prepared and consolidated, eliminating the need for resource-intensive polling operations.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multiple channels are used for communication, then communication capacity increases, but the complexity of determining which registers have been updated increases

Engineering Contradiction:
Improvecommunication capacityVSAvoidregister management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system adds another dimension to register management by introducing the bitmap register as a separate layer of abstraction. Instead of managing multiple channel registers directly, the system uses the bitmap register as an additional dimension that maps to channel register statuses, simplifying the management complexity while supporting multiple channels.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8478909B1Method and system for communication across multiple channels
Publication Date: 2013.07.02 MARVELL ASIA PTE LTD
  • US8478909B1 patent drawing
  • US8478909B1 patent drawing
  • US8478909B1 patent drawing

AI summary

Machine implemented method and system is provided. The method includes sending a packet to a device by a computing system; determining an address for the packet, where an interface logic for the device determines the address; updating a location associated with the address; where the interface logic for the device updates the location; updating a bitmap value associated with the location to indicate to a processor for the device that a location associated with the address has been updated; where the interface logic updates the bitmap value; clearing the bitmap value by writing a same value that is read by the processor for the device; and processing the packet received by the device.