Semiconductor Device BJT Isolation Well Region
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Solution Overview
Problem
The formation of isolated bipolar junction transistors (BJT) in high voltage integrated circuits complicates the process and creates parasitic BJT structures, limiting the flexibility and size reduction of high voltage side semiconductor devices.
Innovation Solution
A semiconductor device design that includes a substrate with a buried layer and well regions to separate the BJT, allowing for a more flexible configuration by using a first well region to isolate the BJT from the buried layer, enabling a smaller size low voltage device to be integrated within the high voltage side device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If an isolated BJT device is formed in the high voltage side region to separate high voltage and low voltage regions, then the high voltage circuit can operate with low power consumption and high efficiency, but the process becomes complicated and parasitic BJT structures are formed
Solution Approach 1:
The patent extracts the BJT device from direct contact with the buried layer by introducing a well region between them. This separation removes the parasitic BJT formation issue while maintaining the isolated BJT's low power consumption and high efficiency characteristics in the high voltage region.
Solution Approach 2:
The patent introduces a well region as an intermediary structure between the BJT device and the buried layer. This intermediate layer acts as a buffer that prevents direct interaction, thereby eliminating parasitic BJT formation while allowing the isolated BJT to maintain its energy efficiency advantages.
2Reliability
If an isolated BJT device is formed in the high voltage side region, then high voltage and low voltage regions are separated, but the device configuration flexibility is reduced and size reduction is limited
Solution Approach 1:
The patent applies local quality by creating a well region with specific electrical properties only in the area where BJT isolation is needed. This localized modification maintains region separation for reliability while allowing other areas of the device to maintain flexibility and enable size reduction through optimized configuration.
Data Source
AI summary
Provided is a semiconductor device including a substrate having a P-type conductivity, a buried layer having an N-type conductivity, an NPN bipolar junction transistor (BJT), and a first well region having the P-type conductivity. The buried layer is located on the substrate. The NPN BJT is located on the buried layer. The first well region is located between the buried layer and the NPN BJT. The NPN BJT is separated from the buried layer by the first well region.