Bipolar Junction Transistor Matrix for High Current Gain

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Solution Overview

Problem

Conventional bipolar junction transistors (BJTs) require increased physical size when multiple transistors are connected, which is undesirable for minimizing size while maintaining improved current gain.

Innovation Solution

A bipolar junction transistor design featuring a matrix arrangement of emitter regions with ring-shaped base regions and a collector region that surrounds the base regions, including an outer ring-shaped and inner cross-shaped portion, along with a second base region and well regions for electrical connectivity, to enhance current gain without increasing size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple bipolar junction transistors are connected in a conventional array to improve current gain, then the current gain increases, but the physical size increases proportionally

Engineering Contradiction:
Improvecurrent gainVSAvoidphysical size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple emitter regions, base regions, and collector regions into a single integrated transistor structure. Multiple emitters share common base and collector regions, merging what would traditionally be separate transistor units into one compact device that achieves high current gain without requiring multiple discrete transistor locations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements a nested structure where emitter regions are surrounded by base regions, which are in turn surrounded by collector regions. The base regions form ring structures that enclose emitter regions, and collector regions form outer rings that enclose the base regions, creating a concentric nested arrangement that maximizes functional density within minimal physical footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If the physical size is minimized, then the device area is reduced, but the current gain deteriorates

Engineering Contradiction:
Improvephysical sizeVSAvoidcurrent gain
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent creates regions with different doping concentrations and geometries optimized for specific functions. Emitter regions have high doping concentrations for efficient carrier injection, base regions have controlled doping and width for carrier transport, and collector regions have appropriate doping for collection. This local optimization of material properties throughout the nested structure enables high current gain within a compact footprint.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent transitions from planar transistor arrangements to a three-dimensional nested structure. By stacking emitter, base, and collector regions in concentric configurations with vertical and radial extensions, the design utilizes multiple spatial dimensions to pack more functional regions into a smaller planar footprint, maintaining high current gain while minimizing device area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10217739B2Bipolar junction transistor and method of manufacturing the same
Publication Date: 2019.02.26 DONGBU HITEK CO LTD
  • US10217739B2 patent drawing
  • US10217739B2 patent drawing
  • US10217739B2 patent drawing

AI summary

A bipolar junction transistor having a relatively reduced size and an improved current gain and a method of manufacturing the same are disclosed. The bipolar junction transistor includes a plurality of emitter regions disposed in a substrate, a plurality of base regions disposed in the substrate and configured to surround the emitter regions, respectively, and a collector region disposed in the substrate and configured to surround the base regions. The plurality of emitter and base regions may be arranged in a matrix.