BLDC Motor Controller Startup Using Current-Adaptive PWM
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Solution Overview
Problem
Brushless direct current (BLDC) motor controllers face challenges in efficient startup sequences due to the need for complex tables of duty cycles and timing delays, which increase hardware requirements and costs, especially when dealing with zero or low-speed conditions.
Innovation Solution
A motor controller with a pulse width modulator and control circuit that adjusts pulse widths based on measured current, eliminating the need for large startup tables by using a comparator and switch circuitry, allowing for a lower-cost microcontroller unit and dynamic adjustment of duty cycles during startup.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If complex tables of duty cycles and timing delays are used for BLDC motor startup control, then the motor can be controlled through zero and low-speed conditions, but the hardware requirements and costs increase
Solution Approach 1:
The patent extracts the complex startup control tables from the microcontroller memory and replaces them with a simplified control circuit that generates startup waveforms through hardware-based PWM modulation and timing mechanisms, thereby reducing memory requirements and hardware complexity while maintaining control capability
Solution Approach 2:
The patent replaces the software-based table lookup approach with a hardware-based PWM control mechanism that automatically generates the necessary duty cycles and timing delays through electrical circuits, eliminating the need for large memory tables and complex microcontroller processing
2Adaptability or versatility
If large startup tables are stored in memory, then comprehensive startup sequences can be implemented, but the memory size and controller cost increase
Solution Approach 1:
The patent removes the large startup tables from memory storage and implements the startup control logic through dedicated hardware circuits that generate timing signals and PWM waveforms, thereby dramatically reducing memory size requirements
Solution Approach 2:
The patent uses hardware circuits to physically generate and replicate the timing patterns and duty cycle sequences that would otherwise be stored in memory, replacing digital table lookups with analog/electrical signal generation
Data Source
AI summary
A controller for a brushless direct current (BLDC) motor includes a pulse width modulator and a control circuit. The pulse width modulator provides a plurality of phase control signals to control corresponding ones of a plurality of phases of the BLDC motor. The control circuit controls the pulse width modulator to provide pulses to the plurality of phases to control a speed of the BLDC motor by causing the pulse width modulator to adjust widths of the pulses when a measured current in an active one of a corresponding phase exceeds a threshold in a startup mode. In one form, the controller is part of a BLDC motor system which also includes a plurality of phase drivers each having inputs for receiving respective ones of said plurality of phase control signals, and outputs adapted to couple to corresponding phases of the BLDC motor.


