Hardware Synchronization Signal for BLE Slave Clock Alignment
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Solution Overview
Problem
In wireless communication networks with a one-to-many topology, such as Bluetooth earphones and bridge monitoring systems, achieving efficient data synchronization between multiple slave devices is challenging due to differences in clock synchronization and hardware resources, leading to potential audio playback mismatches and reduced reliability.
Innovation Solution
A data synchronization method using a hardware synchronization signal generated by a pure hardware circuit within the Bluetooth Low Energy (BLE) protocol stack, allowing slave devices to synchronize with a master device at a preset time, and adjusting the clock based on audio transmission and playback differences to ensure synchronized audio playback.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If software synchronization is used for data synchronization between slave devices, then the system complexity is reduced, but the synchronization efficiency and reliability deteriorate
Solution Approach 1:
The patent replaces software-based synchronization mechanisms with hardware-based synchronization signals. The master device generates hardware synchronization signals that are transmitted to slave devices through the BLE communication link, where they are processed by hardware circuits rather than software routines. This substitution of software with hardware mechanisms directly resolves the contradiction by improving synchronization reliability while maintaining acceptable system complexity.
Solution Approach 2:
The patent introduces hardware synchronization signals as an intermediary element between the master device and slave devices. These signals serve as a dedicated synchronization channel that operates independently of the main data communication path. By using this intermediary hardware signal, the system achieves reliable synchronization without requiring complex software coordination protocols.
2Adaptability or versatility
If hardware synchronization signals are generated at higher protocol layers, then the synchronization functionality is more flexible, but the generation efficiency deteriorates
Solution Approach 1:
The patent resolves this contradiction by operating in multiple dimensions of the protocol stack. Hardware synchronization signals are generated at the physical or link layer (lower dimension) for high-speed generation, while still serving synchronization purposes for upper-layer application data (higher dimension). This multi-dimensional approach allows the system to achieve both high generation efficiency at the hardware level and sufficient flexibility for application-specific synchronization needs.
Solution Approach 2:
The patent segments the synchronization function from the main data communication function. Instead of trying to achieve both high efficiency and flexibility within a single protocol layer, the synchronization signal generation is separated and placed at the lower hardware layer, while data communication continues to operate at upper software layers. This segmentation allows each layer to optimize for its specific purpose without compromising the other.
3Ease of operation
If clock synchronization differences between slave devices are not adjusted, then the system operation is simpler, but the audio playback synchronization deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where slave devices monitor their local clock synchronization status relative to the master device. When clock drift or desynchronization is detected, the system automatically triggers clock adjustment procedures. This feedback-based approach maintains audio playback accuracy without requiring constant manual intervention or overly complex pre-configuration, thus resolving the contradiction between operational simplicity and synchronization precision.
Data Source
AI summary
A data synchronization method, device, equipment, system and storage medium. Including: if a first data packet received by a slave device from a master device during a current Bluetooth low energy (BLE) connection interval is a new data packet, the slave device generates a hardware synchronization signal, which is a synchronization signal generated by a pure hardware circuit; if a data synchronization time of the slave device with the master device is a preset time in the current BLE connection interval, then the slave device performs data synchronization with the master device at the data synchronization time through triggering by the hardware synchronization signal.