BLE Transceiver RF Port Switching With Adjustable Capacitors

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Solution Overview

Problem

Current ultra-low-power (ULP) wireless transceivers for IoT applications, such as Bluetooth low energy (BLE), face challenges in reducing power consumption and system cost while maintaining performance, as high-power RX subsystems from cellular markets are not suitable for IoT due to energy efficiency and performance trade-offs.

Innovation Solution

The implementation of an all-digital and digitally intensive architecture for the frequency synthesizer, transmitter, and receiver, using a time-to-digital converter in an all-digital PLL, discrete-time passive switched capacitor circuits, and a digitally controlled power amplifier with a transformer-based matching network to achieve full system integration and low power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-performance RX subsystems from cellular market are used, then performance is improved, but power dissipation increases

Engineering Contradiction:
ImproveperformanceVSAvoidpower dissipation
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the fundamental operating parameters of the RX subsystem by implementing a direct-conversion architecture with digitally controlled gain stages and noise figure optimization, transitioning from analog-heavy cellular designs to a digitally-intensive IoT-optimized design that achieves ultra-low power consumption while maintaining performance

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If ULP architecture is implemented, then power consumption is reduced, but system cost and complexity increase

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent merges the frequency synthesizer, transmitter, and receiver into a highly integrated transceiver chip with full system integration, combining multiple subsystems that would traditionally require separate components, thereby reducing overall system complexity while maintaining ULP operation

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transceiver is designed with multi-functionality to handle both receiving and transmitting operations with integrated frequency synthesis and power amplification, eliminating the need for separate dedicated circuits and reducing overall system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of stationary object

If full system integration is achieved, then die area is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedie areaVSAvoidintegration precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent segments the transceiver into distinct functional blocks (frequency synthesizer, transmitter, receiver, T/R switch) that can be independently optimized and manufactured, then integrated together, allowing for modular manufacturing processes that reduce precision requirements while achieving full system integration

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10326491B2Transceiving device
Publication Date: 2019.06.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10326491B2 patent drawing
  • US10326491B2 patent drawing
  • US10326491B2 patent drawing

AI summary

A transceiving device includes: a signal port, arranged to relay an RF input signal during a first mode, and to relay an RF output signal during a second mode different from the first mode; a receiver, coupled to the signal port; a transmitter, coupled to the signal port; and a first adjustable capacitor, coupled to the signal port. The second adjustable capacitor is arranged to have a first capacitance during the first mode such that the RF input signal is received by the receiver, and the second adjustable capacitor is arranged to have a second capacitance during the second mode such that the RF output signal is transmitted to the signal port.