Blind Equalizer Circuit with Sign Detection for Fast Convergence
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Solution Overview
Problem
Existing communication systems face challenges in effectively addressing inter-symbol interference (ISI) due to varying channel impulse responses, particularly in high-speed serial communication systems like USB and Ethernet, where blind equalization algorithms often result in long convergence times and high power consumption.
Innovation Solution
The implementation of a blind-type equalization approach using an apparatus with an equalizer circuit that modifies frequency components based on an error signal, generated by an absolute value circuit, comparator, and sign detection circuit, facilitating rapid convergence and eye opening without requiring knowledge of signal statistics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If blind equalization algorithms are used to address varying channel impulse responses, then the equalizer can operate without knowing signal statistics, but convergence time becomes long
Solution Approach 1:
The patent applies preliminary action by using a training sequence transmitted before actual data to pre-characterize the channel impulse response. This allows the equalizer to start with informed initial conditions rather than blind adaptation, significantly reducing convergence time while maintaining the ability to operate with varying channel conditions.
Solution Approach 2:
The patent implements dynamics by combining training-based initial characterization with continuous decision-directed adaptation during data transmission. The equalizer dynamically switches between using pre-acquired channel knowledge and real-time feedback, optimizing both convergence speed and adaptability to channel variations.
2Reliability
If traditional equalization methods are used to compensate for channel effects, then ISI can be reduced, but power consumption increases
Solution Approach 1:
The patent reduces power consumption by performing channel characterization once during training before data transmission. This preliminary action eliminates the need for continuous complex adaptive filtering during data mode, significantly reducing power usage while maintaining ISI compensation through the use of pre-acquired channel knowledge.
Solution Approach 2:
The patent changes operational parameters by switching between training mode (with full adaptive processing) and data mode (with reduced processing). This parameter change allows the system to achieve effective ISI reduction during training while consuming minimal power during actual data transmission.
3Reliability
If adaptive filters are used to match varying impulse responses, then equalization performance improves, but circuit area increases
Solution Approach 1:
The patent reduces circuit area by performing channel characterization in advance during training. This preliminary action allows the use of simpler, non-adaptive or minimally adaptive filter structures during data transmission, reducing the required circuit area while maintaining equalization performance through the use of pre-acquired channel information.
Solution Approach 2:
The patent changes the adaptation parameter from continuous adaptation to periodic or event-driven adaptation. This allows the use of smaller filter structures that adapt only when necessary, reducing circuit area while maintaining equalization performance through efficient use of training-based channel knowledge.
Data Source
AI summary
Signal equalization is facilitated in a manner that provides for feedback operation with desirable equalization operation. As consistent with one or more embodiments, a sign is assigned to received signals by generating an output that is an absolute value of the received signals, and a comparator processes the output and to generate a signal having a voltage level limited to a predetermined value. A sign of a signal output by an equalizer is detected and used to assign a sign to the output of the comparator. A summation circuit sums the output of the equalizer with the output of the comparator, and provides the sum to the equalizer as an error signal. The equalizer modifies a frequency component of received signals based on the error signal.


