Blind IQ Balance Circuit for Direct Conversion Receivers
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Solution Overview
Problem
Direct conversion receivers face challenges with DC offset and IQ imbalance, particularly in public safety applications, where precise I and Q balancing is required to meet interference rejection standards, and existing solutions struggle to maintain balance over environment variations and time.
Innovation Solution
A direct conversion receiver device with a blind IQ balance circuit that continuously and blindly balances I and Q signals without a pilot signal, using a multi-stage filtering and correction process involving amplitude and phase balancing, and an adaptive near-zero intermediate frequency (NZIF) selection to minimize interference from adjacent channel signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a direct conversion receiver is used to reduce component count, then device size and cost are reduced, but DC offset and IQ imbalance performance deteriorate
Solution Approach 1:
The patent implements a feedback mechanism where the receiver continuously monitors its own I and Q signal balance and automatically adjusts balancing parameters to compensate for DC offset and IQ imbalance, thereby maintaining reliable performance without adding significant hardware complexity
Solution Approach 2:
The direct conversion receiver performs self-correction of its own defects through automated IQ balancing algorithms that adjust parameters based on received signals, eliminating the need for external calibration equipment or manual adjustment while maintaining performance reliability
2Object-affected harmful factors
If high pass filtering is applied to remove DC component, then DC offset is reduced, but adjacent channel interference rejection deteriorates
Solution Approach 1:
The patent dynamically adjusts the near-zero intermediate frequency (NZIF) parameter to optimize the balance between DC offset rejection and adjacent channel interference rejection, shifting the operating frequency point based on signal conditions to achieve both goals simultaneously
3Object-generated harmful factors
If precise IQ balancing is implemented to meet interference rejection standards, then adjacent channel rejection is improved, but device complexity and cost increase
Solution Approach 1:
The system performs automated self-balancing of I and Q signals through continuous monitoring and adjustment of balancing parameters, achieving precise IQ balance and meeting interference rejection standards without requiring complex manual calibration procedures or additional hardware components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces bit error rates and improves adjacent channel rejection, enabling smaller, cheaper communications devices with enhanced performance and compliance with public safety standards by intelligently adjusting the NZIF frequency and filtering signals.
Implementation Method 1
The mixer is coupled to the blind IQ balance circuit and configured to generate I and Q baseband signals
Implementation Method 2
The direct conversion receiver demodulates the received signal using synchronous detection. The synchronous detection is based upon a local oscillator operating at a frequency close to or identical to the carrier frequency of the received signal
Data Source
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AI summary
A direct conversion receiver device may receive I and Q signals. The direct conversion receiver device may include a blind IQ balance circuit configured to balance the I and Q signals without a pilot signal, and a mixer coupled to the blind IQ balance circuit and configured to generate I and Q baseband signals using an operational frequency, the operational frequency being based upon bandwidth and modulation of the I and Q signals. The blind IQ balance circuit may include a first stage configured to generate an intermediate amplitude balanced Q signal based upon the I and Q signals, and a second stage coupled to the first stage and configured to generate phased balanced I and Q signals based upon the intermediate amplitude balanced Q signal and the I signal.