Minimizing Blind Via Current Loops in High-Density Interconnects
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Solution Overview
Problem
Existing circuit design methods fail to effectively minimize vertical current discontinuities caused by blind vias in high-density interconnects within VLSI circuits, as they require extensive electromagnetic analysis and do not account for the three-dimensional nature of the problem.
Innovation Solution
A methodology and computer program that identify and optimize the position of return current vias relative to blind vias to minimize current loops, using a workstation computer system to analyze and adjust the layout of integrated circuit substrates without requiring extensive electromagnetic analysis, by defining regions around blind vias and computing a quality value based on the ratio of critical signal vias to return current vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If extensive electromagnetic analysis is performed to accurately model current discontinuities and coupling effects, then measurement precision and reliability of the analysis are improved, but device complexity and computation time increase significantly
Solution Approach 1:
The patent extracts only the critical geometric parameters (via positions, reference plane locations, and distance measurements) from the complex electromagnetic problem. By focusing on these key spatial relationships rather than performing full electromagnetic field simulation, the solution achieves sufficient accuracy without the computational complexity of extensive electromagnetic analysis.
Solution Approach 2:
The patent uses simple geometric calculations and basic mathematical operations instead of complex electromagnetic solvers. The analysis employs straightforward distance computations and ratio calculations that can be performed quickly and with minimal computational resources, replacing expensive and time-consuming electromagnetic modeling.
2Measurement precision
If three-dimensional analysis of current discontinuities is performed to account for vertical current components and return path loops, then measurement precision is improved, but device complexity and computation time increase
Solution Approach 1:
The patent segments the three-dimensional current path analysis into discrete, manageable steps: (1) identifying blind via positions, (2) locating reference planes, (3) calculating vertical current components, (4) determining return path locations, and (5) computing loop areas. This segmentation allows each component to be analyzed independently and efficiently, avoiding the need for time-consuming full three-dimensional electromagnetic simulation.
Solution Approach 2:
The patent replaces complex electromagnetic field calculations with geometric and mathematical operations. Instead of solving Maxwell's equations for three-dimensional current distribution, the solution uses straightforward spatial relationships, distance calculations, and ratio comparisons to achieve the same analytical goals with significantly reduced computational effort.
3Ease of operation
If automated visual inspection techniques are used to inspect signal paths, then ease of operation is improved, but measurement precision deteriorates due to two-dimensional limitations
Solution Approach 1:
The patent transitions from two-dimensional planar inspection to three-dimensional spatial analysis by incorporating vertical current components and reference plane positions. The solution calculates loop areas in three-dimensional space by considering the vertical displacement between signal vias and return path vias, thereby achieving accurate measurements while maintaining automated operation.
Data Source
AI summary
A design method and system for minimizing blind via current loops provides for improvement of electrical interconnect structure design without requiring extensive electromagnetic analysis. Other vias in the vicinity of a blind via carrying a critical signal are checked for suitability to conduct return current corresponding to the critical signal that is disrupted by the transition from a layer between two metal planes to another layer. The distance to the return current via(s) is checked and the design is adjusted to reduce the distance if the distance is greater than a specified threshold. If the blind via transition is to an external layer, suitable vias connect the reference plane at the internal end of the blind via to an external terminal. If the transition is between internal layers, suitable vias are vias that connect the two reference planes surrounding the reference plane traversed by the blind via.