Blind Via Interconnection in 3D Microelectronic Stacks
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Solution Overview
Problem
Current methods for producing connection structures in 3D microelectronic devices are inefficient, requiring multiple steps and lacking precision in interconnecting components across multiple levels of superimposed microelectronic supports.
Innovation Solution
A method involving the formation of blind holes through stacked supports, followed by the simultaneous deposition of conductive material in these holes and on the surface, using masking to create conductive vias of varying heights without the need for subsequent etching, allowing for reduced steps and precise interconnection of components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to produce connection structures in 3D microelectronic devices, then multiple production steps are required including etching, but manufacturing precision and interconnection accuracy across multiple levels deteriorate
Solution Approach 1:
The patent applies preliminary action by forming a masking layer with openings at predetermined locations before depositing the conductive material. This pre-positioned masking structure guides the subsequent deposition process, ensuring that conductive material is deposited only in the desired locations to form conductive vias and connection structures, thereby improving interconnection accuracy while streamlining the overall process
Solution Approach 2:
The patent merges multiple functions into a single deposition step. The same deposition process simultaneously forms conductive material in blind holes (creating conductive vias), on the surface (creating connection structures), and fills the masking openings, eliminating the need for separate etching steps and reducing process complexity
2Productivity
If multiple etching steps are performed to create conductive structures, then manufacturing precision may improve, but production time and process complexity increase
Solution Approach 1:
The patent combines multiple sequential steps (masking formation, opening creation, and conductive material deposition) into an integrated process flow. The masking layer serves dual purposes as both a protective layer and a deposition template, allowing simultaneous formation of conductive vias and connection structures in one deposition step, thereby significantly reducing production cycle time
Solution Approach 2:
The patent extracts and eliminates the separate etching step from the conventional multi-step process. By using a pre-formed masking layer with openings instead of etching to create conductive pathways, the method removes an entire process category, reducing both time and complexity while maintaining manufacturing precision
3Manufacturing precision
If conductive material is deposited in multiple separate steps, then manufacturing precision may be maintained, but the number of production steps and process complexity increase
Solution Approach 1:
The masking layer performs multiple functions simultaneously: it protects underlying structures, defines the pattern for conductive material deposition, and serves as a template for forming both conductive vias in blind holes and connection structures on the surface. This multi-functionality maintains precision while reducing the number of separate process steps
Solution Approach 2:
The patent merges the formation of conductive vias and connection structures into a single deposition step. The conductive material is deposited simultaneously in the blind holes (forming vias) and on the surface (forming connection structures), guided by the pre-formed masking openings, thereby reducing process complexity while maintaining placement accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables efficient and precise interconnection of electronic components across different levels of microelectronic supports, reducing the complexity and number of steps in the production process while ensuring effective connectivity and adaptability to encapsulated stacks.
Implementation Method 1
the blind holes are produced by piercing by means of a laser
Implementation Method 2
deposition of a conductive material in said first blind hole, said second blind hole and on a given region of said front face of said stack
Data Source
AI summary
Method for producing a microelectronic device formed from a stack of supports (W) each provided with one or more electronic components (C) and comprising a conductive structure (170, 470) formed from a first blind conductive via (171b, 472) and a second blind conductive via (171a, 473) with a greater height, the first via and the second via being connected together.