Blind Via Stub Reduction in Multilayer PCBs
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Solution Overview
Problem
Existing methods for forming blind vias in printed circuit boards (PCBs) face challenges such as signal integrity disturbances due to unused via portions, known as stubs, which result in signal reflections, capacitance, inductance discontinuities, and signal losses, especially as PCBs become smaller and more complex, and are difficult to control in thicker formats.
Innovation Solution
A method involving forming a sub-composite core with conductive and dielectric layers, drilling via holes, plating them with conductive material, filling with conductive ink, backdrilling to remove stubs, and laminating with non-conductive ink to create blind plated through holes, which minimizes stub length and processing difficulties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-holes are used for electrical interconnections, then signal transmission between layers is achieved, but signal integrity deteriorates due to stubs causing reflections, capacitance, inductance discontinuities, and signal losses
Solution Approach 1:
The via structure is segmented into two types: through-vias for power and ground connections (where stubs are acceptable) and blind vias for signal connections (where stubs are eliminated). This segmentation allows different via types to be optimized for their specific functions, resolving the signal integrity issue while maintaining effective interconnection.
Solution Approach 2:
The harmful stub portions are extracted and removed from the signal path by using blind vias that terminate at the appropriate layer instead of extending through the entire PCB thickness. This extraction eliminates the source of signal reflections and impedance discontinuities.
2Reliability
If blind vias are formed to eliminate stubs, then signal integrity is improved, but manufacturing complexity increases due to additional processing steps
Solution Approach 1:
The manufacturing process is segmented into separate sequences for through-vias and blind vias. Through-vias follow the traditional drill-plat-fill sequence, while blind vias use a modified sequence with depth-controlled drilling and selective plating. This segmentation allows each via type to be manufactured optimally without requiring complete process redesign.
Solution Approach 2:
Depth-controlled drilling is performed as a preliminary action before plating to create the blind via structure. By controlling the drill depth to stop at the appropriate layer, the blind via geometry is established before plating, simplifying subsequent manufacturing steps and reducing overall complexity.
3Length of moving object
If backdrilling is used to remove stubs, then stub length is reduced, but manufacturing difficulty increases especially for thicker PCB formats
Solution Approach 1:
Depth-controlled drilling is performed as a preliminary action before plating to create the blind via structure. By controlling the drill depth to stop at the appropriate layer, the blind via geometry is established before plating, simplifying subsequent manufacturing steps and reducing overall complexity.
Solution Approach 2:
The mechanical backdrilling process is replaced with a drilling process that uses depth control to directly create the blind via structure in the first place. This substitution eliminates the need for the complex backdrilling operation, particularly for thicker PCB formats where depth control during backdrilling becomes increasingly difficult.
4Strength
If copper plating is applied thick enough for subsequent drilling, then via hole structural integrity is maintained, but plating time increases and minimum dielectric thickness is limited
Solution Approach 1:
Depth-controlled drilling is performed as a preliminary action before plating to create the blind via structure. By controlling the drill depth to stop at the appropriate layer, the blind via geometry is established before plating, simplifying subsequent manufacturing steps and reducing overall complexity.
Solution Approach 2:
The plating thickness is optimized locally for each via type and location. Blind vias receive sufficient plating to maintain structural integrity and electrical performance without the excessive thickness required for through-vias that will be backdrilled. This local optimization reduces plating time while maintaining necessary via strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces stub length, improves signal integrity by minimizing signal attenuation, increasing channel bandwidth, reducing electromagnetic interference, and eliminating parasitic inductance and capacitance, resulting in improved signal propagation and reduced resonance.
Implementation Method 1
plating an inner surface of the first via hole with a conductive material to form a first plated via hole
Implementation Method 2
filling the first plated via hole with a conductive ink
Implementation Method 3
filling the backdrilled segment with a non-conductive ink prior to laminating
Implementation Method 4
laminating the second conductive layer of the first sub-composite core to a second sub-composite core
Data Source
AI summary
A multilayer PCB having may include a first sub-composite core having a first core structure sandwiched between a first conductive layer and a second conductive layer, the first core structure including one or more dielectric and conductive layers. A first via hole extends at least partially through the first core structure, wherein an inner surface of the first via hole is plated with a conductive material along a first via segment electrically coupling the first conductive layer to an internal layer or trace within the first core structure. A second via segment extending between the second conductive layer and the internal layer or trace is devoid of the conductive material such that the first via hole is substantially stub free. A first dielectric layer is coupled to the second conductive layer. A second sub-composite core coupled to the first dielectric layer.