Separate Block Ack Buffering for Latency-Sensitive Wi‑Fi Traffic

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Solution Overview

Problem

Current wireless technologies, such as IEEE 802.11, prioritize high throughput over low latency, failing to meet the low latency requirements of real-time applications (RTA) which necessitate enhanced block Ack mechanisms for latency sensitive traffic streams.

Innovation Solution

Implementing a separate block Ack mechanism for latency sensitive traffic streams, with independent receive reordering buffer control, allowing MSDUs or A-MSDUs to be processed in order of increasing sequence numbers, differentiated from regular traffic within the same TID.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a unified block Ack mechanism is used for all traffic in the same TID, then channel efficiency is improved through aggregated acknowledgements, but latency sensitive traffic cannot be prioritized and may expire before processing

Engineering Contradiction:

Improvechannel efficiencyVSAvoidlatency

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent segments the receive reordering buffer into multiple independent buffers, one for each traffic stream (identified by SCSID). This allows latency sensitive traffic to be processed independently from regular traffic, preventing it from being delayed by other packets in the same TID while maintaining block Ack efficiency within each segment.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies different quality of service characteristics to different parts of the buffer by maintaining separate receive reordering buffers for latency sensitive traffic versus regular traffic. Each buffer can be managed with appropriate priorities and timing requirements, allowing latency critical packets to be processed with higher priority.

Inventive Principle:

Principle #3Local quality

2Loss of time

If separate block Ack mechanisms are implemented for latency sensitive traffic, then timely delivery is improved, but device complexity increases due to multiple buffer management structures

Engineering Contradiction:

ImprovelatencyVSAvoidbuffer management complexity

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The patent uses a universal buffer management structure where multiple receive reordering buffers follow the same operational patterns and protocols. Each buffer is identified by an SCSID and managed through standardized procedures, reducing the complexity overhead of having multiple buffers while enabling differentiated handling of traffic types.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12563597B2Block acknowledgement agreement for latency sensitive traffic stream

Publication Date: 2026.02.24 SONY GROUP CORP

AI summary

An enhanced method of handling block Acks, such as for latency sensitive traffic streams, for which a separate block Ack mechanism is established, which is separate from other traffic in the same TID. With this separate block Ack mechanism the recipient STA can have an independent receive reordering buffer control for latency sensitive traffic, so that the MSDU or A-MSDU of latency sensitive traffic can be passed to the next MAC process in order of increasing sequence number of the MSDUs or A-MSDUs since those MSDUs and A-MSDUs have the same QoS requirement, such as the latency time. This mechanism reduces the chances of latency sensitive traffic being stuck in a receive reordering buffer behind other traffic in the TID and having its traffic expire.