Block Acknowledgment Scheme for Wireless Data Transmission

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Solution Overview

Problem

Current wireless communication systems face inefficiencies in data transmission and acknowledgment processes, particularly with block acknowledgments, leading to increased latency and memory requirements due to the need for reordering and buffering of data units, especially when some units are intentionally skipped or not received.

Innovation Solution

Implementing a block acknowledgment scheme where the recipient acknowledges only data units received in consecutive order, allowing the originator to retransmit missing units and reducing the need for reordering buffers by transmitting a block acknowledgment that includes information about successfully received and not received data units, enabling more efficient link adaptation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If block acknowledgment is implemented to acknowledge only consecutively received data units, then latency is reduced and memory requirements are lowered, but the complexity of the acknowledgment scheme increases

Engineering Contradiction:
ImprovelatencyVSAvoidacknowledgment scheme complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The block acknowledgment mechanism segments the acknowledgment process by tracking individual data units in sequence. Each data unit is acknowledged separately based on its sequence number, allowing the receiver to identify exactly which units were received consecutively and send targeted block acknowledgments. This segmentation enables precise control over which data units need retransmission, reducing unnecessary buffering and reordering operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The block acknowledgment scheme implements feedback mechanisms where the receiver sends back acknowledgment information about successfully received data units to the transmitter. This feedback loop allows the transmitter to adjust its transmission strategy, retransmit only the missing units rather than the entire block, thereby reducing latency and memory requirements while maintaining efficient communication.

Inventive Principle:
Principle #23Feedback

2Reliability

If data units are retransmitted that were intentionally skipped or not received, then reliability is improved, but the efficiency of data transmission decreases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiddata transmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The block acknowledgment mechanism applies local quality control by examining each data unit's sequence number and reception status individually. Instead of treating all data units uniformly, the system identifies specific units that were intentionally skipped or not received and targets only those for retransmission. This localized approach ensures reliability for problematic units while maintaining efficiency for successfully transmitted units.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system implements partial action by sending block acknowledgments that cover only the necessary range of data units. Rather than acknowledging every single unit individually or retransmitting the entire block, the mechanism sends consolidated acknowledgment information for groups of consecutively received units, reducing overhead while ensuring all skipped units are properly addressed.

Inventive Principle:
Principle #16Partial or excessive action

3Manufacturing precision

If reordering buffers are used to handle out-of-order data units, then the ability to process data correctly is improved, but memory requirements increase

Engineering Contradiction:
Improvedata processing correctnessVSAvoidmemory requirements
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The block acknowledgment scheme introduces dynamic tracking of data unit reception based on sequence numbers. Instead of using static, fixed-size reordering buffers, the system dynamically identifies which data units need retransmission by comparing expected sequence numbers with actually received units. This dynamic approach eliminates the need for large fixed buffers while ensuring correct data processing order.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The mechanism extracts the essential information needed for correct data processing - the sequence numbers and reception status of individual data units - rather than buffering the actual data units themselves. By separating the acknowledgment function from the data handling function, the system reduces memory requirements while maintaining the ability to process data correctly through sequence-based tracking.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9712284B2Device, system and method of communicating aggregate data units
Publication Date: 2017.07.18 INTEL CORP
  • US9712284B2 patent drawing
  • US9712284B2 patent drawing
  • US9712284B2 patent drawing

AI summary

Some demonstrative embodiments include devices, systems and/or methods of communicating aggregate data units. For example, a device may include a wireless communication unit to communicate an aggregate data unit including a plurality of data units in an increasing order of sequence numbers assigned to the data units, such that a first data unit having a first sequence number always precedes a second data unit having a second sequence number, greater than the first sequence number.