Block-Based Non-Maximum Suppression for Object Detection

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Solution Overview

Problem

Conventional non-maximum suppression techniques in computer vision are computationally costly and demand high memory bandwidth, making them inefficient for detecting objects by suppressing non-local maximum scores in images.

Innovation Solution

Implementing a block-based non-maximum suppression method that processes scores in blocks, reducing computation costs and memory bandwidth by computing local maxima using hardware circuits and data paths, and providing both approximate and exact suppression schemes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional non-maximum suppression techniques are used to detect objects by suppressing non-local maximum scores, then detection accuracy is maintained, but computation cost and memory bandwidth requirements become excessively high

Engineering Contradiction:
Improvedetection accuracyVSAvoidcomputation cost
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the array of scores into multiple blocks, where each block contains a subset of scores. Instead of performing non-maximum suppression on the entire array at once, the system processes each block independently using dedicated hardware circuits. This segmentation reduces the computational complexity from O(N) for the entire array to O(N/B) for B blocks, while maintaining detection accuracy by ensuring that local maxima within each block are correctly identified.

Inventive Principle:
Principle #1Segmentation

2Reliability

If conventional non-maximum suppression techniques are used to ensure accurate object detection, then detection reliability is improved, but memory bandwidth and caching demands become unacceptably high

Engineering Contradiction:
Improvedetection reliabilityVSAvoidmemory bandwidth
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

By segmenting the score array into blocks and processing them independently, the patent reduces memory bandwidth requirements. Each hardware circuit processes only its assigned block, requiring minimal memory access compared to conventional approaches that must access the entire score array. This segmentation allows the system to maintain detection reliability while reducing memory bandwidth consumption by a factor proportional to the number of blocks.

Inventive Principle:
Principle #1Segmentation

3Productivity

If block-based non-maximum suppression is implemented using hardware circuits and data paths, then computation speed and efficiency are improved, but device complexity increases

Engineering Contradiction:
Improvecomputation speedVSAvoidhardware circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical/software-based non-maximum suppression process with dedicated hardware circuits and data paths. Each hardware circuit is designed to perform non-maximum suppression operations in parallel, utilizing fixed-function logic and arithmetic units. This substitution of mechanical processing with hardware implementation significantly improves computation speed, achieving real-time processing capabilities that would be infeasible with software-based approaches, despite the increased hardware complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10621464B1Block based non-maximum suppression
Publication Date: 2020.04.14 AMBARELLA INT LP
  • US10621464B1 patent drawing
  • US10621464B1 patent drawing
  • US10621464B1 patent drawing

AI summary

An apparatus includes an interface and a processor. The interface may be configured to receive an array of scores. The processor may be configured to (i) parse the array of scores into a data flow including one or more operators, (ii) schedule the operators in one or more data paths, (iii) divide the array of scores into blocks of two or more scores by processing the array of scores using the one or more data paths, (iv) compute per-block information using the one or more data paths, and (v) compute local maxima position information for the array of scores by performing block based non-maximum suppression based on the per-block information using the one or more data paths. The data paths are generally implemented with a plurality of hardware circuits.