Block-Based Signal Processing for DSP Memory Optimization
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Solution Overview
Problem
Existing signal-flow architectures for image processing, particularly on digital signal processors (DSPs), face inefficiencies due to high memory requirements and frequent external memory accesses, making it challenging to develop optimized program code for complex image processing tasks.
Innovation Solution
The implementation of block-based signal processing, where data is processed in blocks rather than individual samples or entire frames, reducing memory requirements and external memory accesses, along with GUI-based tools for defining and auto-generating code for signal flows, allowing for efficient image processing on DSPs and other hardware with memory limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frame-based signal processing is used, then processing completeness is improved, but memory requirements and external memory accesses increase
Solution Approach 1:
The patent divides the image frame into multiple blocks that are processed sequentially. Each block is a smaller subset of the complete frame, allowing processing to be done in manageable chunks rather than loading the entire frame into memory at once. This segmentation reduces peak memory requirements while maintaining complete processing of all frame data.
2Speed
If sample-based signal processing is used, then processing speed is improved, but suitability for image processing applications deteriorates
Solution Approach 1:
The patent applies different processing granularities to different aspects of image processing. Individual samples (pixels) are processed quickly within each block, while blocks themselves are processed in a sequence suitable for image processing operations. This allows fast sample-level operations combined with block-level operations that are appropriate for image processing tasks.
3Reliability
If frame-based signal processing is used, then processing completeness is improved, but processing efficiency deteriorates
Solution Approach 1:
By segmenting the frame into blocks that can be processed sequentially with smaller memory footprints, the system achieves both complete processing and improved efficiency. The blocked architecture allows for better utilization of local memory and reduces costly external memory accesses compared to frame-based processing.
Solution Approach 2:
The patent employs periodic loading and processing of blocks in a systematic sequence. Rather than loading and processing the entire frame at once, blocks are loaded, processed, and output in periodic cycles, improving memory utilization and processing throughput.
4Productivity
If complex signal flow implementation is performed manually, then processing optimization is improved, but development complexity increases
Solution Approach 1:
The patent describes tools that automatically generate the complex signal flow implementation code from a block diagram specification. The system serves itself by providing automated code generation that handles the complexity of memory management, data flow, and optimization, eliminating the need for manual implementation of complex signal processing architectures.
Data Source
AI summary
Signal flows for data-processing applications may be implemented so as to enable each processing node in the flow when it contains a sufficient amount of input data at its input buffer. In various embodiments, such signal flows can be graphically defined in a GUI tool which, thereafter, auto-generates suitable code for implementing the signal flow.