Block Control Command Generation Circuit for Memory Block Management
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Solution Overview
Problem
As the number of memory blocks in semiconductor memory apparatuses increases, the required chip real estate for block control command generation circuits also increases, leading to inefficiencies in space utilization and operational flexibility.
Innovation Solution
A block control command generation circuit is designed with first and second latch units, input selection units, pull-down driving units, and output selection units to selectively generate and output block control command signals, allowing for efficient storage and transmission of initial values and enabling state changes of memory blocks between lock, unlock, and lock-down states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of memory blocks is increased, then the storage capacity is improved, but the chip real estate occupied by block control command generation circuits increases
Solution Approach 1:
Multiple block control command generation circuits are merged into a single shared circuit. The circuit receives block control signals for multiple memory blocks and generates corresponding block control command signals through latch units and selection units, allowing one circuit to serve multiple blocks instead of requiring separate circuits for each block.
Solution Approach 2:
The block control command generation circuit is designed with universal functionality to handle control signals from multiple memory blocks. The latch units store initial values and the selection units selectively output commands based on which memory block requires control, making the circuit multi-functional rather than dedicated to a single block.
2Manufacturing precision
If separate block control command generation circuits are provided for each memory block, then the control precision is improved, but the device complexity increases
Solution Approach 1:
The circuit combines multiple control functions into a unified structure with shared latch units and selection units. Instead of having separate independent circuits for each memory block, the design merges the control logic while maintaining the ability to precisely control individual blocks through the selection mechanism.
Solution Approach 2:
The latch units and selection units act as intermediaries between the input block control signals and the output block control command signals. These intermediary components enable precise control of individual memory blocks while using a shared circuit structure, reducing overall complexity.
Data Source
AI summary
A block control command generation circuit includes first and second latch units, an input selection unit, a pull-down driving unit, and an output selection unit. The first and second latch units store initial values at different levels in response to initialization signals. The input selection unit selectively transmits a first block control signal to the first latch unit in response to an input enable signal. The pull-down driving unit selectively pull-down drives an input node of the second latch unit in response to a second block control signal and the input enable signal. The output selection unit outputs signals, which are stored in the first and second latch units, as first and second block control command signals in response to an output enable signal, respectively.


