Block Copolymer Self-Assembly for High-Density IC Patterning
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Solution Overview
Problem
As semiconductor integration density increases, existing methods struggle to efficiently form patterns with high precision and density, leading to challenges in manufacturing integrated circuit devices with high performance and reduced feature sizes.
Innovation Solution
A method involving the formation of guide patterns and block copolymer layers on a substrate, where phase-separation of the block copolymer forms self-aligned vertical and horizontal domains, allowing for precise etching of features with reduced pattern density in peripheral regions, thereby simplifying the manufacturing process and reducing unnecessary pattern formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If existing patterning methods are used to increase integration density, then feature sizes decrease, but manufacturing precision and pattern quality deteriorate due to inability to efficiently form high-density patterns
Solution Approach 1:
The substrate is divided into a first region (active region) and a second region (peripheral region), with different guide pattern formation strategies applied to each region. This segmentation allows optimized patterning for high-density active circuits while avoiding unnecessary patterns in peripheral areas, maintaining precision across different functional zones.
Solution Approach 2:
Different guide pattern configurations are applied locally to different regions: the first guide pattern with multiple openings is formed only in the first region where high pattern density is needed, while the second guide pattern covers both regions but with different functional requirements. This local differentiation ensures manufacturing precision is maintained where needed without wasting resources elsewhere.
2Manufacturing precision
If guide patterns are formed across the entire substrate to ensure pattern quality, then manufacturing precision improves, but device complexity increases due to unnecessary pattern formation in peripheral regions
Solution Approach 1:
The guide pattern formation is segmented by region type. The first guide pattern is selectively formed only in the first region where actual circuit patterns are needed, while the second guide pattern is formed in the second region only where necessary for process control. This eliminates unnecessary guide patterns in peripheral areas, reducing device complexity while maintaining pattern quality in active regions.
Solution Approach 2:
Different guide pattern strategies are applied to different regions based on their functional requirements. The first region receives the first guide pattern with multiple openings for high-precision patterning, while the second region receives the second guide pattern only where needed. This local quality approach ensures pattern quality is maintained where required without adding unnecessary complexity elsewhere.
3Ease of manufacture
If traditional etching methods are used to form high-density patterns, then manufacturing process remains simple, but productivity decreases due to inability to form precise high-density features
Solution Approach 1:
Guide patterns are formed preliminarily before the actual pattern formation step. These pre-formed guide patterns serve as templates that direct subsequent self-assembly or etching processes, enabling high-density pattern formation with a single etching step rather than requiring multiple iterative steps, thus improving productivity while keeping the process relatively simple.
Solution Approach 2:
The guide patterns act as intermediary structures that mediate between the simple etching process and the complex high-density pattern requirement. By introducing these intermediate guide patterns, the process maintains simplicity at each step while achieving high productivity and precision in the final pattern formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of integrated circuit devices with high pattern density and precision, reducing the need for trimming processes and effectively utilizing chip area, while maintaining high manufacturing efficiency.
Implementation Method 1
phase-separating the block copolymer layer to form a plurality of first vertical domains and a second vertical domain
Implementation Method 2
a plurality of first vertical domains and a second vertical domain, the plurality of first vertical domains being self-aligned on the plurality of first local regions
Data Source
AI summary
A method of forming a pattern including forming a feature layer on a substrate having first and second regions; forming a first guide pattern on the first region, the first guide pattern having openings therein, the openings exposing the feature layer; forming a second guide pattern covering the feature layer exposed through the first guide pattern on the first region and covering the second region; forming a block copolymer layer covering the first guide pattern and the second guide pattern on the first and second regions; phase-separating the block copolymer layer to form first vertical domains and a second vertical domain; removing the first vertical domains on the first region; and etching the first guide pattern and the feature layer using the second vertical domain as an etch mask on the first region to form a feature pattern having holes therein.