Block Copolymer Self-Assembly for Semiconductor Fine Patterning
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in forming fine patterns with reduced pitch, as the resolution in photolithography processes is stretched to its limits, making it difficult to achieve highly integrated semiconductor devices with smaller pattern sizes and tighter spacing.
Innovation Solution
A patterning method involving the sequential formation of a lower layer, mask layer, and block copolymer layers, where pillars are formed to fill openings, and thermal treatment is used to create guide openings, allowing for the formation of second openings with precise spacing and arrangement, independent of photolithography resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography process is used to form patterns, then manufacturing process is simple, but pattern pitch cannot be reduced further due to resolution limits
Solution Approach 1:
The patterning process is divided into multiple stages: first forming a mask layer with initial openings, then forming block copolymer layers that self-assemble into additional patterns. This segmentation allows the final pattern pitch to be smaller than what single-step photolithography can achieve, while managing process complexity through systematic breakdown of steps.
Solution Approach 2:
Block copolymer layers are introduced as intermediary materials that self-assemble on the mask layer to create additional patterns. These polymers act as mediators that translate the initial larger-pitch mask patterns into finer final patterns, enabling pitch reduction beyond photolithography limits.
2Area of moving object
If pattern size is reduced to increase integration density, then device integration improves, but photolithography resolution becomes insufficient
Solution Approach 1:
The block copolymer layer performs self-assembly to automatically form patterns with precise spacing. The polymer molecules self-organize into regular structures driven by their own thermodynamic properties, eliminating the need for high-resolution photolithography to define the final fine patterns and achieving uniform small pattern areas.
Solution Approach 2:
The method changes the governing parameter for pattern formation from photolithography optical resolution to block copolymer self-assembly thermodynamics. By controlling polymer composition, molecular weight, and annealing conditions, precise pattern dimensions are achieved through material parameter optimization rather than optical parameter limits.
3Quantity of substance
If more patterns are integrated in given area, then device functionality increases, but spacing between patterns becomes too small for conventional methods
Solution Approach 1:
The mask layer with initial openings serves as a disposable template that guides block copolymer self-assembly but is not required in the final structure. This temporary sacrificial mask enables precise pattern spacing control through the mask geometry, while the block copolymer's self-organizing properties ensure uniform spacing even at very high pattern densities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of fine patterns with uniform pitch and reduced spacing, improving the integration density of semiconductor devices and reducing dependency on photolithography resolution, while maintaining control over pattern uniformity and arrangement.
Implementation Method 1
performing a thermal treatment to the block copolymer layer to form a first block portion and second block portions
Implementation Method 2
performing a thermal treatment to the block copolymer layer to form a first block portion and second block portions
Data Source
AI summary
Methods of forming fine patterns for semiconductor devices are provided. A method may include sequentially forming a lower layer and a mask layer having first openings on a substrate, forming pillars to fill the first openings and protrude upward from a top surface of the mask layer, forming a block copolymer layer on the substrate with the pillars, performing a thermal treatment to the block copolymer layer to form a first block portion and second block portions, removing the second block portions to form guide openings exposing the mask layer, and etching the mask layer exposed by the guide openings to form second openings.