Block Decoder Defective Block Management NAND Flash Yield
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Solution Overview
Problem
NAND flash memory devices face challenges in utilizing defective blocks effectively, leading to reduced memory cell array yield as these blocks are typically configured as non-selected to prevent word line driving issues.
Innovation Solution
A nonvolatile semiconductor memory device with a block decoder that includes a defective block flag circuit using multi-level data to switch between selected and non-selected blocks, allowing defective blocks to be used by storing and managing multi-level data in latch circuits, thereby enabling the use of previously non-functional blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If defective blocks are configured as non-selected to prevent word line driving issues, then reliability is improved, but productivity deteriorates due to reduced memory cell array yield
Solution Approach 1:
The block decoder dynamically switches between selected and non-selected states for blocks based on real-time defective block flag status. During normal operation, defective blocks are switched to non-selected state to prevent word line driving issues. During recovery mode, the system switches defective blocks to selected state when safe, maximizing usable capacity. This dynamic state change resolves the contradiction by adapting block selection to operational conditions.
Solution Approach 2:
The system changes the selection parameter (selected/non-selected state) of blocks based on the defective block flag status. When the flag indicates a block is defective, it is switched to non-selected state for reliability. When the flag status changes or recovery mode is activated, the parameter is changed to allow selected state, thereby improving yield while maintaining reliability through controlled parameter transitions.
2Reliability
If defective blocks are completely excluded from use, then reliability is improved, but device complexity increases due to additional block management overhead
Solution Approach 1:
The block decoder autonomously manages block selection by monitoring its own defective block flag status without requiring external intervention. The system self-determines which blocks to select or non-select based on internal flag states, reducing the need for complex external management circuits and minimizing device complexity while maintaining reliability.
Solution Approach 2:
The block decoder serves multiple functions: it decodes block addresses, monitors defective block flags, dynamically switches block selection states, and manages recovery operations. By consolidating these functions into a single multi-functional component, the system avoids adding separate management circuits, thereby limiting the increase in device complexity while achieving reliable block management.
3Productivity
If multi-level data is stored in latch circuits to manage defective blocks, then productivity is improved by increasing usable blocks, but device complexity increases due to additional circuit components
Solution Approach 1:
The defective block flag storage function is merged with the existing latch circuits in the block decoder. Instead of adding separate storage elements, the system utilizes the available latch circuit capacity to store multi-level data representing defective block status. This merging approach increases productivity by enabling sophisticated block management while minimizing the increase in device complexity through resource consolidation.
Solution Approach 2:
The multi-level defective block flag data is nested within the existing latch circuit structure. The latch circuits, originally designed for basic block address latching, are nested to also store and manage defective block status information. This nesting allows the system to track multiple blocks' status using the same hardware resources, improving productivity without proportionally increasing device complexity.
Data Source
AI summary
According to a certain embodiment, the nonvolatile semiconductor memory device includes: a memory cell array including a plurality of selected blocks and a plurality of non-selected blocks; and a row decoder including a block decoder configured to switch between the selected block and the non-selected block. The row decoder switches a block determined to be a defective block to a non-selected block and switches a block determined not to be a defective block to a selected block, on the basis of the multi-level data. The block decoder includes a defective block flag circuit including a plurality of latch circuits configured to store multi-level data.


