Block Design Containers for Hierarchical Circuit Integration
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Solution Overview
Problem
Existing Electronic Design Automation (EDA) systems for creating circuit designs for integrated circuits (ICs) face challenges in managing complex designs, as IP cores packaged as blocks are not editable within top-level block designs, requiring manual reintegration and reconnection upon changes, which is inefficient and error-prone, especially when multiple design teams are involved.
Innovation Solution
The introduction of block design containers (BDCs) allows for the creation of hierarchical circuit designs, enabling customization and parameter propagation within the EDA system, facilitating Dynamic Function eXchange (DFX) and reducing the need for manual reintegration by allowing multiple variants of sub-designs to be managed within a single block design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If IP cores are packaged as blocks for reuse in top-level block designs, then design reusability and modularity are improved, but editability and ease of modification are worsened
Solution Approach 1:
The patent implements a hierarchical structure where IP cores are nested within block design containers, which are in turn nested within top-level block designs. This nesting allows IP cores to be packaged for reusability while maintaining the ability to edit them through the container interface, resolving the contradiction between reusability and editability.
Solution Approach 2:
The block design container acts as an intermediary layer between the IP core and the top-level block design. This intermediary enables the IP core to be packaged and reused while the container provides the editability interface, allowing modifications without breaking the reusability model.
2Adaptability or versatility
If IP cores are packaged and integrated into top-level block designs, then design modularity is improved, but design time and reintegration effort are worsened
Solution Approach 1:
The patent performs preliminary actions by pre-packaging IP cores into block design containers with all necessary interface definitions and connection points established in advance. This preliminary structuring eliminates the need for time-consuming manual reintegration and reconnection when modifying or replacing IP cores.
Solution Approach 2:
The design is segmented into hierarchical layers (IP cores, block design containers, top-level block designs) with well-defined interfaces. This segmentation allows independent modification of individual IP cores without affecting the entire system, reducing reintegration time while maintaining modularity.
3Adaptability or versatility
If manual reintegration and reconnection are performed when changing IP cores, then design flexibility is maintained, but productivity and error rate are worsened
Solution Approach 1:
The block design container provides self-service capabilities by automatically managing the integration and connection of IP cores. When an IP core is modified or replaced, the container automatically handles the reintegration process, maintaining design flexibility while eliminating manual reconnection tasks and improving productivity.
Solution Approach 2:
The system implements feedback mechanisms that automatically detect changes to IP cores and trigger appropriate reintegration actions. This feedback loop maintains design flexibility through automated responses to changes, improving productivity by eliminating manual intervention and reducing errors.
Data Source
AI summary
Circuit design development using block design containers can include opening, within a development environment generated by an Electronic Design Automation (EDA) system, a top-level block design specifying a circuit design and inserting, within the top-level block design using the EDA system, a block design container. The block design container specifies a source block design used as a sub-design within the top-level block design.