Block-Based Diagnostic Triggering for Program Execution Tracing
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Solution Overview
Problem
Existing diagnostic mechanisms in data processing systems, such as ETM trace mechanisms, operate instruction-by-instruction, which is intrusive and constraining, especially in high-speed and complex systems with out-of-order or speculative execution, making it difficult to diagnose issues without interfering with normal system operation.
Innovation Solution
The system generates block signals indicative of processing contiguous blocks of program instructions, using comparator circuitry to trigger diagnostic operations at programmable addresses, allowing retrospective analysis of instruction-by-instruction behavior without the need for continuous tracking, and employs programmable diagnostic control points with priority values or storage-ordering to manage relative ordering of trigger points.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If diagnostic mechanisms operate at instruction-by-instruction level, then diagnostic precision is improved, but system performance and complexity are worsened
Solution Approach 1:
The patent segments the continuous instruction stream into discrete instruction blocks. The block indicating circuitry divides processing into manageable units, allowing diagnostic triggers to be evaluated at block boundaries rather than at every single instruction. This segmentation maintains diagnostic capability while reducing the frequency and overhead of diagnostic operations, thereby preserving system performance.
Solution Approach 2:
The patent implements periodic diagnostic checking by evaluating trigger conditions only at instruction block boundaries rather than continuously at every instruction. The block indicating circuitry generates periodic block signals that activate the comparator circuitry at regular intervals corresponding to instruction block completion. This periodic action reduces diagnostic overhead while maintaining effectiveness.
2Measurement precision
If diagnostic mechanisms operate at instruction-by-instruction level, then diagnostic precision is improved, but device complexity is worsened
Solution Approach 1:
The patent introduces block indicating circuitry that segments the instruction stream into blocks, adding a single layer of abstraction between the instruction stream and diagnostic circuitry. This segmentation simplifies the overall system architecture by reducing the granularity at which diagnostic comparisons must occur, thereby lowering device complexity while maintaining diagnostic precision at the block level.
Solution Approach 2:
The patent merges the block indication function with the existing instruction processing pipeline. The block indicating circuitry leverages the natural block structure already present in the processor's instruction fetch and decode stages, combining diagnostic functionality with existing processing blocks rather than adding separate continuous monitoring infrastructure.
3Adaptability or versatility
If diagnostic mechanisms constrain normal operation, then diagnostic capability is improved, but system reliability is worsened
Solution Approach 1:
The patent employs periodic diagnostic triggering at instruction block boundaries rather than continuous monitoring at every instruction. The block signal activates the comparator circuitry only at these periodic intervals, allowing the system to operate normally between diagnostic checkpoints without constraint. This periodic approach maintains diagnostic capability while minimizing interference with normal system operation and preserving reliability.
Solution Approach 2:
The patent performs preliminary block indication and trigger evaluation at instruction block boundaries before full diagnostic analysis is required. The block indicating circuitry prepares trigger signals in advance at block boundaries, allowing the system to maintain normal operation while having diagnostic information ready when needed, thus reducing real-time constraints on system performance.
Data Source
AI summary
A data processing apparatus 2 is provided including diagnostic mechanism 10, 12 and comparator circuitry 8. The comparator circuitry 8 is responsive to a signal indicative of execution of a block of program instructions to trigger any watchpoints or watch ranges within that block of program instructions. The relative ordering of the watchpoints or watch ranges is established by ordering characteristics associated therewith, such as programmable priority values, or an implicit ordering given by the storage location of the watchpoint or watch range.