Block Family Read Calibration for Temperature-Shifted NAND Memory
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Solution Overview
Problem
Existing memory sub-systems fail to adequately address temporal voltage shift caused by slow charge loss, leading to increased bit error rates due to temperature variation and program-erase cycles, without employing efficient strategies.
Innovation Solution
Implementing a memory sub-system that tracks temporal voltage shift for grouped memory cells (block families) and applies appropriate voltage offsets based on temperature and time since programming, using a block family manager to manage these groups and perform calibration to improve read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage offsets are applied to compensate for temporal voltage shift, then read accuracy is improved, but device complexity increases due to tracking and calibration mechanisms
Solution Approach 1:
The memory device is divided into multiple block families, each tracked independently with its own voltage offset. This segmentation allows the system to manage complexity by dividing the tracking task into smaller, independent units rather than managing all memory blocks as a single complex system.
Solution Approach 2:
The system performs calibration operations to determine voltage offsets before actual read operations occur. By pre-calculating and storing the voltage offsets in metadata during calibration phases, the system avoids complex real-time calculations during read operations, thus improving read accuracy without proportionally increasing operational complexity.
2Reliability
If block families are tracked with metadata, then bit error rate is reduced, but use of energy increases due to tracking and calibration operations
Solution Approach 1:
Calibration operations are performed periodically rather than continuously, allowing the system to maintain accurate voltage offset tracking while reducing energy consumption. The metadata is updated at scheduled calibration intervals, balancing reliability improvement with energy efficiency during normal operation.
Solution Approach 2:
The system uses previously calibrated voltage offset data to serve subsequent read operations without requiring continuous external calibration input. The metadata stored from prior calibration operations enables the system to self-correct for temporal voltage shift during normal reads, reducing the frequency and energy cost of calibration operations.
3Measurement precision
If calibration operations are performed frequently, then voltage offset accuracy is improved, but productivity decreases due to time spent on calibration
Solution Approach 1:
Calibration operations are performed in advance during idle periods or initialization phases, preparing voltage offset data before it is needed for read operations. This preliminary calibration ensures accurate voltage offsets are ready when reads occur, improving offset accuracy without blocking productive read operations.
Solution Approach 2:
The system performs calibration on a partial basis, updating voltage offsets for only those block families that require recalibration based on their specific usage patterns and temperature conditions. This selective calibration approach maintains sufficient accuracy while minimizing the time spent on calibration operations and preserving read throughput.
Data Source
AI summary
A system includes a memory device and a processing device, operatively coupled to the memory device. The processing device determines a reference temperature value for a block family while the block family is open and measures a temporal voltage shift (TVS) value of a voltage level within one or more memory cells of the block family. The processing device determines a threshold voltage offset bin based on the reference temperature value and the TVS value and reads data from any page of the block family via application of a threshold voltage offset, specified by the threshold voltage offset bin, to a base read level voltage.