Block Family Voltage Bin Selection for Temporal Shift Compensation
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Solution Overview
Problem
Existing memory sub-systems face increased bit error rates due to temporal voltage shift caused by slow charge loss in memory cells, which current technologies either fail to adequately address or do so inefficiently.
Innovation Solution
The memory sub-system employs block family-based error avoidance strategies by tracking temporal voltage shift and applying appropriate voltage offsets to base read levels for programmed memory cells grouped by block families, allowing for efficient read operations and reducing bit error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If block family-based error avoidance strategies are implemented with temporal voltage shift tracking, then bit error rates are reduced, but device complexity increases
Solution Approach 1:
The patent segments memory blocks into block families based on their temporal voltage shift characteristics. Each block family is tracked separately with its own voltage offset, allowing differentiated error avoidance strategies for different block groups. This segmentation enables manageable complexity by organizing blocks into families rather than treating all blocks individually.
Solution Approach 2:
The patent changes the voltage parameter by applying different voltage offsets to different block families based on their temporal voltage shift characteristics. The controller dynamically adjusts read voltage levels for each block family, transforming a single-voltage approach into a multi-voltage approach that adapts to aging effects and reduces bit errors.
2Measurement precision
If voltage offsets are applied to compensate for temporal voltage shift, then read accuracy improves, but operation speed decreases
Solution Approach 1:
The patent performs preliminary voltage offset determination during block family creation or calibration phases. By pre-calculating and storing the appropriate voltage offsets for each block family, the system avoids performing complex voltage adjustments during actual read operations. This preliminary action ensures read accuracy while maintaining operational speed.
Solution Approach 2:
The system implements self-service by automatically tracking and adjusting voltage offsets for each block family without requiring manual intervention. The controller autonomously monitors temporal voltage shift and applies appropriate compensation, eliminating the need for external calibration procedures that would slow down operations.
3Reliability
If multiple block families are tracked separately with individual voltage offsets, then error avoidance improves, but management overhead increases
Solution Approach 1:
The patent merges the management of multiple block families by implementing a unified block family data structure that tracks voltage offsets and temporal characteristics for all families in a centralized manner. The controller uses a single management routine that handles voltage offset determination for any block family, reducing redundant operations and minimizing management overhead time.
Solution Approach 2:
The patent creates a universal block family management mechanism that can handle any block family with a standardized approach. The voltage offset tracking and adjustment system is designed to work uniformly across all block families, allowing the same management procedures to serve multiple purposes and reducing the need for family-specific management code.
Data Source
AI summary
A set of two or more block families associated with a bin boundary of a first voltage bin is identified. A determination of at least a first voltage for a first block family of the plurality of block families and a second voltage for a second block family of the plurality of block families based on values of a data state metric for each of the plurality of block families. In response to a determination that a difference between the first voltage and the second voltage satisfies a block family combination criterion, the second block family is merged with the first block family.