Block Floating Point Scaling Factor Detection in CPU

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Solution Overview

Problem

Existing CPU architectures face inefficiencies in implementing block floating point processing due to significant overheads in control code for dynamic range detection, leading to increased design size and power dissipation, especially when dealing with varying signal dynamic ranges in digital signal processing applications.

Innovation Solution

A system and method for computing a block floating point scaling factor by detecting the dynamic range of an input signal in a CPU using a dynamic range monitoring unit that includes leading zero and one detectors, registered maximum count units, and a scaling factor computation module, allowing for dynamic range detection without additional overhead cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If floating-point emulation software routines are used on fixed-point processors to achieve extended dynamic range, then the dynamic range is improved, but the cycle time and computational overhead increase significantly

Engineering Contradiction:
Improvedynamic rangeVSAvoidcycle time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The data is segmented into blocks, and a common exponent is determined for each block based on the maximum amplitude element. This allows fixed-point processors to achieve floating-point-like dynamic range without emulating full floating-point operations, significantly reducing cycle time while maintaining extended dynamic range capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically changes the exponent parameter for blocks of data based on signal amplitude characteristics. By adjusting the common exponent according to the maximum amplitude element in each block, the system adapts the dynamic range to match the actual signal requirements, avoiding the overhead of software emulation while achieving similar performance.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If block floating point algorithm with common exponent is used, then the dynamic range is extended, but the hardware implementation complexity increases

Engineering Contradiction:
Improvedynamic rangeVSAvoidhardware implementation
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The exponent information is extracted and stored separately from the mantissa data. By determining the common exponent once per block and storing it as a separate data word, the system avoids the complexity of full floating-point hardware while achieving extended dynamic range through simple scaling operations on the fixed-point data.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The common exponent mechanism serves multiple functions: it provides dynamic range extension, enables efficient scaling of entire data blocks, and reduces the need for per-element exponent storage. This multi-functional approach extends dynamic range while minimizing hardware complexity compared to full floating-point implementation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If higher arithmetic data-path widths are used to support block floating point, then the dynamic range capability is improved, but the design area and power dissipation increase

Engineering Contradiction:
Improvedynamic range capabilityVSAvoiddesign area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The system dynamically adjusts the effective data-path width utilization by applying scaling factors based on the common exponent. Instead of requiring permanently wider data paths, the system uses the full width of the existing fixed-point processor dynamically, achieving floating-point-like dynamic range capability without increasing the physical design area.

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If conventional floating-point implementation is used, then the dynamic range is achieved, but the hardware implementation cost is high

Engineering Contradiction:
Improvedynamic rangeVSAvoidhardware implementation cost
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Instead of implementing expensive, complex floating-point hardware units, the system uses simple fixed-point arithmetic with periodic scaling operations. The common exponent mechanism acts as a lightweight, disposable approximation that achieves floating-point dynamic range capability at a fraction of the hardware implementation cost.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS8788549B2Zero overhead block floating point implementation in CPU's
Publication Date: 2014.07.22 TEJAS NETWORKS LTD
  • US8788549B2 patent drawing
  • US8788549B2 patent drawing
  • US8788549B2 patent drawing

AI summary

A system for computing a block floating point scaling factor by detecting a dynamic range of an input signal in a central processing unit without additional overhead cycles is provided. The system includes a dynamic range monitoring unit that detects the dynamic range of the input signal by snooping outgoing write data and incoming memory read data of the input signal. The dynamic range monitoring unit includes a running maximum count unit that stores a least value of a count of leading zeros and leading ones, and a running minimum count that stores a least value of the count of trailing zeros. The dynamic range is detected based on the least value of the count of leading zeros and leading ones and the count of trailing zeros. The system further includes a scaling factor computation module that computes the block floating point (BFP) scaling factor based on the dynamic range.