Variable-Length Block LDPC Coding for Flexible Rate and Complexity

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Solution Overview

Problem

Current LDPC codes in mobile communication systems face limitations in coding rate and complexity, particularly in supporting high-speed, high-capacity data transmission, with most codes having a coding rate of ½ and limited flexibility in block length, which hinders performance in variable data transmission scenarios.

Innovation Solution

The development of a method and apparatus for coding and decoding block Low Density Parity Check (LDPC) codes with variable block lengths, utilizing a parity check matrix design that maximizes cycle length and minimizes coding complexity, allowing for optimal degree distribution and supporting various coding rates such as ½, ⅔, ¾, and ⅚, by selecting appropriate permutation matrices and partial block sizes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a fixed block length LDPC code is used, then the coding scheme is simple and easy to implement, but it cannot support variable data transmission requirements and has limited adaptability

Engineering Contradiction:
Improvesupport for variable block lengthsVSAvoidcoding scheme complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic block length support by allowing the LDPC code to adaptively select different block lengths (e.g., 192, 384, 576, 768, 1024 bits) based on the actual data transmission requirements. The coding scheme transitions from a static fixed block length to a dynamic variable block length system, enabling the code to adjust its parameters in real-time to match the traffic conditions while maintaining a unified base structure for manageable complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes key parameters of the LDPC code including block length, coding rate, and parity check matrix dimensions to support variable data transmission. By modifying these parameters dynamically, the system can adapt to different transmission scenarios (e.g., changing from 192-bit to 1024-bit blocks) without fundamentally altering the underlying LDPC coding structure, thus achieving adaptability with controlled complexity increase.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If LDPC codes with higher coding rates are used to support high-speed data transmission, then transmission capacity increases, but error correction capability may be compromised

Engineering Contradiction:
Improvedata transmission rateVSAvoiderror correction capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent employs parameter changes by providing multiple coding rate options (1/2, 2/3, 3/4, 4/5) and allowing dynamic selection based on channel conditions and transmission requirements. The system can switch between different coding rates and corresponding parity check matrices to optimize the balance between transmission rate and error correction capability, achieving high productivity when channel conditions permit while maintaining reliability when conditions deteriorate.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a unified parity check matrix is used for all block lengths, then device complexity is reduced, but coding performance cannot be optimized for specific block lengths

Engineering Contradiction:
Improveparity check matrix storageVSAvoidcoding performance optimization
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the parity check matrix into base matrices that can be combined through tensor products to generate parity check matrices for different block lengths. Instead of storing one large unified matrix or multiple completely separate matrices, the system uses a segmented approach with base matrices (e.g., 4x4, 8x8, 16x16) that can be systematically expanded to create optimized parity check matrices for various block lengths, reducing storage requirements while maintaining performance optimization.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7516391B2Apparatus and method for coding/decoding block low density parity check code with variable block length
Publication Date: 2009.04.07 NOKIA TECHNOLOGIES OY
  • US7516391B2 patent drawing
  • US7516391B2 patent drawing
  • US7516391B2 patent drawing

AI summary

Disclosed is a device and procedure for coding a block low density parity check (LDPC) code having a variable length. The a device and procedure includes receiving an information word; and coding the information word into a block LDPC code according to a first parity check matrix or a second parity check matrix depending on a length to be applied when generating the information word into the block LDPC code.