Block Processing Pipeline Prefetching for Video Encoding

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Solution Overview

Problem

Conventional block processing pipelines in video encoding methods require frequent memory fetches for each block, leading to inefficiencies in processing digital video frames, especially when blocks are processed in scan order, which increases latency and reduces processing speed.

Innovation Solution

The implementation of a block processing pipeline that prefetches pixel data from a reference frame into a shared search window memory, allowing multiple stages to process blocks from multiple rows using a single set of pixel data, and advances the search window by one column, reducing the number of memory fetches needed, particularly by processing blocks in groups rather than individually.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If blocks are processed individually in scan order, then each block can be processed sequentially, but frequent memory fetches are required for each block leading to increased latency and reduced processing speed

Engineering Contradiction:
Improveprocessing speedVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements a prefetch mechanism that loads reference frame data into the search window memory before it is actually needed by the pipeline stages. By anticipating future data requirements and pre-loading them, the system eliminates wait time during processing, thereby reducing latency and improving overall processing speed without requiring additional memory bandwidth per block.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent processes multiple blocks from different rows simultaneously by maintaining a shared search window memory that holds reference data for multiple blocks. Instead of fetching memory for each block individually, the system merges the memory access operations and serves multiple blocks from the pre-loaded data, reducing the frequency of memory fetches and improving processing throughput.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If frequent memory fetches are performed for each block, then each block has access to its required pixel data, but the number of memory access operations increases leading to reduced processing efficiency

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidnumber of memory fetches
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The prefetch mechanism proactively loads reference frame data into the search window memory before the pipeline stages require it. This preliminary action ensures that when blocks are processed, the required pixel data is already available in fast memory, eliminating the need for frequent memory fetches during the actual processing phase and thereby improving processing efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The shared search window memory serves multiple blocks simultaneously, making a single memory load operation universal for multiple processing tasks. Instead of dedicating separate memory fetch operations to each block, the system designs the memory system to serve multiple blocks from a single pre-loaded dataset, reducing the total quantity of memory fetches required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If blocks from multiple rows are processed using a single set of pixel data, then memory fetches are reduced, but the search window memory must be advanced to accommodate different blocks

Engineering Contradiction:
Improvenumber of memory fetchesVSAvoidsearch window management
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The search window memory is designed to be dynamically adjustable, allowing the system to shift the window position to accommodate different blocks from multiple rows. This dynamic capability enables the same physical memory structure to serve different logical regions as needed, facilitating multi-block processing without requiring separate static memory allocations for each block, thereby reducing memory fetches while managing complexity through flexibility.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9292899B2Reference frame data prefetching in block processing pipelines
Publication Date: 2016.03.22 APPLE INC
  • US9292899B2 patent drawing
  • US9292899B2 patent drawing
  • US9292899B2 patent drawing

AI summary

Block processing pipeline methods and apparatus in which pixel data from a reference frame is prefetched into a search window memory. The search window may include two or more overlapping regions of pixels from the reference frame corresponding to blocks from the rows in the input frame that are currently being processed in the pipeline. Thus, the pipeline may process blocks from multiple rows of an input frame using one set of pixel data from a reference frame that is stored in a shared search window memory. The search window may be advanced by one column of blocks by initiating a prefetch for a next column of reference data from a memory. The pipeline may also include a reference data cache that may be used to cache a portion of a reference frame and from which at least a portion of a prefetch for the search window may be satisfied.