Block-row decoder voltage control for semiconductor reliability
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Solution Overview
Problem
The existing semiconductor memory decoder circuitry is prone to performance degradation and failure due to voltage-induced stresses, leading to non-functional memory devices.
Innovation Solution
The implementation of a block-row decoder design that includes a voltage translator and a voltage multiplexer to provide a reduced voltage (VSAFE) to decoder switches when a block-row decoder is deselected, preventing voltage-induced stress and maintaining the integrity of deselected memory blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decoder switches are biased to different voltages to select memory locations, then memory locations can be properly selected and accessed, but voltage-induced stresses cause performance degradation and circuit failure over time
Solution Approach 1:
The patent applies different voltage levels to different parts of the decoder circuit based on their selection state. Selected decoder switches receive full operating voltage for proper functionality, while deselected switches receive reduced voltage (VSAFE) to minimize stress. This local differentiation of voltage quality resolves the contradiction by providing high voltage only where needed for selection while protecting other circuits from voltage-induced degradation.
Solution Approach 2:
The patent implements a safety voltage mechanism that proactively reduces voltage to deselected decoder switches before voltage-induced stress can cause damage. By continuously monitoring decoder state and applying reduced voltage to deselected switches in advance, the system cushions against potential failures and extends circuit lifespan while maintaining proper operation of selected switches.
2Adaptability or versatility
If full voltage is applied to all decoder switches, then all memory locations can be accessed, but deselected memory locations cannot be properly protected from voltage-induced damage
Solution Approach 1:
The patent implements local quality by applying different voltage levels to different decoder switches based on their functional state. Selected switches receive full voltage to maintain memory access capability, while deselected switches receive reduced safety voltage to protect against damage. This spatial and functional differentiation resolves the contradiction between maintaining versatility and ensuring reliability.
3Productivity
If decoder switches are operated at high voltage for extended periods, then memory operations can be performed continuously, but transistor breakdown occurs reducing device lifespan
Solution Approach 1:
The patent implements beforehand cushioning by proactively applying reduced voltage to deselected decoder switches before damage can occur. This continuous protective措施 allows the memory to operate continuously at high productivity while extending the lifespan of the decoder circuit by minimizing cumulative voltage stress on non-active switches.
Solution Approach 2:
The patent implements periodic action by dynamically switching voltage levels based on decoder selection state. Selected switches periodically receive full voltage for operations, while deselected switches periodically receive reduced protective voltage. This periodic modulation of voltage levels enables continuous productivity while preserving circuit lifespan through alternating stress conditions.
Data Source
AI summary
Block-row decoders, memory block-row decoders, memories, methods for deselecting a decoder of a memory and methods of selecting a block of memory are disclosed. An example memory block-row decoder includes a plurality of block-row decoders, each of the block-row decoders having a decoder switch tree. Each block-row decoder is configured to bias a block select switch of the decoder switch tree with a first voltage while the block-row decoder is deselected and further configured to bias decoders switches of the decoder switch tree that are coupled to the block select switch with a second voltage while the block-row decoder is deselected, the second voltage less than the first voltage. An example method of deselecting a decoder of a memory includes providing decoder signals having different voltages to decoder switches from at least two different levels of a decoder switch tree while the decoder is deselected.