Block Sequential Receiver for GSM/EDGE ISI Reduction
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Solution Overview
Problem
Current GSM/EDGE technology faces challenges in achieving higher peak rates and spectral efficiency due to inter-symbol-interference (ISI) and inter-block-interference (IBI) caused by transmitter and receiver imperfections, carrier frequency offset, and co-channel interference, which are not effectively addressed by existing slot formats.
Innovation Solution
A block sequential receiver method that sequentially removes blocks of training sequences, tail bits, and user data blocks, using channel estimates and pre-filters to reduce ISI and IBI, and employs an overlap-and-add process in the frequency domain to reconstruct and demodulate signals, allowing for shorter zero padding or cyclic prefix lengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional slot formats are used with fixed block structures, then the system maintains compatibility with existing GSM/EDGE networks, but inter-symbol-interference (ISI) and inter-block-interference (IBI) cannot be effectively reduced, limiting peak rate and spectral efficiency
Solution Approach 1:
The patent divides the received signal into multiple blocks (first block, second block, third block) with different structures. The first block contains training sequences and tail bits for channel estimation, while the second and third blocks contain user data. This segmentation allows the receiver to process each block sequentially with appropriate handling, reducing ISI and IBI effects that would occur in a fixed single-block structure.
Solution Approach 2:
The patent introduces dynamic block sequential processing where the receiver adapts its processing steps based on the actual block structure detected. The receiver dynamically adjusts channel estimation, equalization, and data detection steps for each block, allowing flexible handling of varying block configurations and reducing interference effects dynamically during reception.
2Reliability
If advanced receiver algorithms are used to compensate for distortions, then communication reliability improves, but the complexity of the receiver increases
Solution Approach 1:
The patent segments the receiver processing into distinct sequential stages: channel estimation using the first block, equalization of the second block, and data detection of the third block. This segmentation allows each stage to be optimized independently, reducing the overall complexity compared to a monolithic receiver algorithm while maintaining high reliability through systematic distortion compensation at each stage.
Solution Approach 2:
The patent performs channel estimation in advance using the training sequences in the first block before processing the user data in subsequent blocks. This preliminary action allows the receiver to have accurate channel information ready for equalization, reducing the complexity needed during data processing while maintaining communication reliability.
3Object-affected harmful factors
If longer zero padding or cyclic prefix is used to reduce ISI, then interference reduction improves, but the data rate and spectral efficiency decrease
Solution Approach 1:
The patent applies different padding strategies to different blocks: the first block has training sequences and tail bits for channel estimation, while the second and third blocks have user data with appropriate padding. This local quality approach allows each block to be optimized for its specific function, reducing ISI where needed without unnecessarily reducing data rate across the entire transmission.
Solution Approach 2:
The receiver dynamically adjusts the handling of zero padding and cyclic prefix for each block based on its content and requirements. This dynamic approach allows the system to optimize ISI reduction for each block individually, preventing the data rate penalty that would result from using excessive padding uniformly across all blocks.
Data Source
AI summary
By exploiting the multi-block structure of the used slot format having a training sequence in the time domain and at least one pre-coded user data block to sequentially reconstruct the slot, using in the first act known symbols and using detected symbols in each subsequent act and improved receiver may be provided. This may result in less ISI/IBI and therefore increased performance.


