Block Time-Domain Equalizer for Fast-Varying TR-STBC Channels
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Solution Overview
Problem
Conventional Time Reversal-Space Time Block Code (TR-STBC) systems face challenges in fast time-varying channels due to the constraint that block Frequency Domain Equalizers (FDE) require explicit knowledge of Channel Impulse Response (CIR) and have equalizer lengths tied to data block lengths, making it difficult to combine training and data blocks within the same block.
Innovation Solution
A block Time Domain Equalizer (TDE) is developed that combines a decoder and equalizer, allowing for flexible block lengths and eliminating zero padding, with equalizer tap weights updated using error vectors, enabling efficient processing in fast time-varying channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If block Frequency Domain Equalizer (FDE) is used in TR-STBC system, then equalization can be performed, but the equalizer length is constrained to be the same as data block length and explicit knowledge of CIR is required, making it difficult to combine training and data blocks within the same block
Solution Approach 1:
The patent merges the decoder and equalizer into a single integrated structure called Block Time Domain Equalizer (TDE). This combination allows the system to process training and data blocks together in the time domain without requiring separate processing stages, thereby achieving flexible block lengths and eliminating the constraint that equalizer length must match data block length.
Solution Approach 2:
The patent transitions from frequency domain processing (FDE) to time domain processing (TDE). This dimensional change allows the system to avoid the constraints of frequency domain equalization, specifically the requirement for explicit CIR knowledge and fixed equalizer length, while maintaining equalization capability.
2Productivity
If conventional block FDE is used, then decoding and equalization can be performed, but computational complexity increases and real-time operation becomes difficult
Solution Approach 1:
By merging the decoder and equalizer into a single Block TDE structure, the patent reduces the overall computational complexity. The integrated structure processes both decoding and equalization functions simultaneously in the time domain, avoiding the separate processing stages required by conventional FDE, thereby enabling real-time operation.
3Productivity
If zero padding is used in conventional FDE, then block processing can be performed, but it increases computational overhead and reduces efficiency
Solution Approach 1:
The patent removes (extracts) the zero padding operation from the processing chain by operating directly in the time domain. The Block TDE processes the received signal without requiring zero padding to match block lengths, thereby eliminating the associated computational overhead and improving processing efficiency.
Data Source
AI summary
Provided is a block Time Domain Equalizer (TDE) for a Time Reversal-Space Time Block Codes (TR-STBC) system. The block TDE comprises a block equalizer which generates an output based on an equalizer tap weight with respect to two consecutively received blocks, an equalizer tap weight updating unit which generates an error vector based on the output and the equalizer tap weight and updates the equalizer tap weight using the error vector, and a signal processing unit which processes the output into a digital signal wherein zero padding is eliminated from the output.