Blocking Gate FinFET Layout for Backside Isolation and Vt Tuning

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Solution Overview

Problem

The integration of semiconductor devices faces challenges in reducing process costs and improving reliability while achieving high performance and high speed, particularly in devices with BackSide Power Delivery Network (BSPDN) structures and FinFETs with three-dimensional channel structures.

Innovation Solution

A semiconductor device design featuring a substrate with active regions, gate structures, blocking gate structures, and backside contact structures, which include distinct materials to create transistors with different threshold voltages, allowing for electrical isolation and reduced process complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are highly integrated with BSPDN structure and FinFETs, then performance and speed are improved, but process cost and manufacturing complexity increase

Engineering Contradiction:
Improvedevice performance and speedVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The substrate is divided into first and second regions with different transistor types (first and second transistors), allowing independent optimization of each region. The gate structures use different materials (first gate material vs. second gate material) to create distinct electrical characteristics without requiring complete redesign of the entire device structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different gate materials are used in different regions: the first gate material in the first region and the second gate material in the second region. This allows local optimization of electrical characteristics (threshold voltage, mobility) for different transistor types while maintaining overall device integration.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If multiple transistor types with different threshold voltages are integrated, then device functionality is improved, but process difficulty increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidprocess difficulty
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The threshold voltage of transistors is controlled by changing the gate material parameter. The first gate material produces transistors with a first threshold voltage, while the second gate material produces transistors with a second threshold voltage, allowing multiple transistor types to be created through material selection rather than complex process variations.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If transistors are electrically isolated, then reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveoperational stabilityVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate material layer is extracted and separated into different material types for different regions. This allows electrical isolation between adjacent transistors of different types by using materials with different electrical properties, reducing cross-talk and improving reliability without requiring additional isolation structures.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20260052763A1Semiconductor devices
Publication Date: 2026.02.19 SAMSUNG ELECTRONICS CO LTD
  • US20260052763A1 patent drawing
  • US20260052763A1 patent drawing
  • US20260052763A1 patent drawing

AI summary

A semiconductor device includes a substrate including an active region extending in a first direction, gate structures extending in a second direction overlapping the active region, on the substrate, and spaced apart from each other in the first direction, a blocking gate structure overlapping the active region, between the gate structures, and extending in the second direction, source/drain regions disposed in a region in which the active region is recessed, on both sides of the blocking gate structure, a backside contact structure disposed below at least one of the source/drain regions, and backside blocking structures disposed below the gate structures and the blocking gate structure, respectively. The blocking gate structure includes a first element different from the gate structures.