Semiconductor Memory Device Using Bloom Filter for Bad Cell Management
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Solution Overview
Problem
During the manufacturing of memory devices, bad cells can occur in the memory cell array, leading to data errors when accessed or read, necessitating the blocking of these cells to prevent errors, but existing technologies lack an efficient method to identify and manage such faulty cells effectively.
Innovation Solution
A memory device incorporating a bloom-filter circuit, cache memory circuit, and selecting circuit to determine if a received address corresponds to a failed cell, using a hash function to generate m-bit codes for failed addresses and comparing them to incoming addresses, allowing for the selection of either cached data or data from the memory cell array based on the comparison results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a cache memory is used to store failed addresses and corresponding data, then data errors from bad cells can be prevented, but the space required for cache memory increases
Solution Approach 1:
The patent uses a bloom-filter circuit to generate hash codes (copies) of failed addresses and stores only these compact hash codes in the cache memory instead of storing the full failed addresses. This copying approach reduces the space required in cache memory while still enabling effective identification and prevention of data errors from bad cells.
2Measurement precision
If the cache memory stores full failed addresses for comparison, then accurate identification of bad cells is achieved, but the complexity of the cache memory circuit increases
Solution Approach 1:
The patent replaces the traditional mechanical/address-based comparison method with a hash function-based computational approach. The bloom-filter circuit uses hash functions to transform failed addresses into compact m-bit codes, and the comparison is performed on these hash codes rather than full addresses. This substitution reduces circuit complexity while maintaining identification accuracy.
3Reliability
If a traditional cache memory stores failed addresses, then access to bad cells can be blocked, but power consumption increases due to extensive address comparison operations
Solution Approach 1:
The patent extracts only the essential identifying feature of failed addresses by generating hash codes through the bloom-filter circuit. Instead of performing power-intensive comparisons of full failed addresses, the system compares compact m-bit hash codes, significantly reducing the number of logical operations and power consumption while maintaining effective bad cell blocking capability.
Data Source
AI summary
A memory device may include a memory cell array, a bloom-filter circuit, a cache memory circuit, and a selecting circuit. The bloom-filter circuit may be configured to output a determination result signal that indicates that there is a possibility that a received address is one of failed addresses corresponding to failed cells of the memory cell array. The cache memory circuit may be configured to, store the failed addresses and a first set of data corresponding to the respective failed addresses, and configured to, when the determination result signal indicates a possibility, provide a comparison result signal by determining whether received address coincides with one of the failed addresses. The selecting circuit may be configured to output either first data of the first set of data or second data of the memory cell array corresponding to the received address based on determination result signal and comparison result signal.