Bloom Filter Memory Collision Detection for Parallel Threads

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Solution Overview

Problem

Existing approaches for memory address collision detection in parallel threads using bloom filters are inefficient due to the need for multiple bloom filters and high propagation costs, especially when dealing with a large number of threads.

Innovation Solution

A single load bloom filter and a single store bloom filter are used to track memory addresses for all parallel threads, with each storage location expanded to store both a bit indicating access and the numerical order of the highest ordered thread that accessed it, allowing for efficient detection of out-of-order operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple bloom filters are used to track memory addresses for parallel threads, then collision detection accuracy is improved, but device complexity and propagation costs increase

Engineering Contradiction:
Improvecollision detection accuracyVSAvoidnumber of bloom filters
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple bloom filters into a single bloom filter by expanding each storage location to store both a bit indicating access and the numerical order of the highest ordered thread that accessed it. This consolidation reduces device complexity while maintaining collision detection accuracy through the expanded storage structure that tracks thread ordering information.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single bloom filter is designed to serve multiple functions: it tracks memory address accesses across all parallel threads, detects collisions, and determines thread ordering relationships. The expanded storage locations simultaneously store access status and thread order information, making the structure multi-functional and eliminating the need for separate filters for each thread.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple bloom filters are used for each parallel thread, then memory address tracking is improved, but propagation costs increase

Engineering Contradiction:
Improvememory address trackingVSAvoidpropagation cost
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent combines multiple bloom filters into one unified structure, reducing the propagation cost associated with updating and querying multiple separate filters. The single bloom filter with expanded storage locations processes all thread memory addresses centrally, eliminating the overhead of coordinating multiple filters while maintaining accurate tracking of each thread's memory access pattern.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If traditional bloom filters are used, then implementation simplicity is maintained, but ability to detect out-of-order operations is insufficient

Engineering Contradiction:
Improveimplementation simplicityVSAvoidout-of-order operation detection
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent enhances the traditional bloom filter by applying local quality expansion to the storage locations. Each location is expanded to contain both a bit indicating access and a numerical value representing the highest ordered thread that accessed it. This localized enhancement at each storage position enables out-of-order operation detection while keeping the overall bloom filter structure and operation simple.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10101999B2Memory address collision detection of ordered parallel threads with bloom filters
Publication Date: 2018.10.16 INTEL CORP
  • US10101999B2 patent drawing
  • US10101999B2 patent drawing
  • US10101999B2 patent drawing

AI summary

A semiconductor chip is described having a load collision detection circuit comprising a first bloom filter circuit. The semiconductor chip has a store collision detection circuit comprising a second bloom filter circuit. The semiconductor chip has one or more processing units capable of executing ordered parallel threads coupled to the load collision detection circuit and the store collision detection circuit. The load collision detection circuit and the store collision detection circuit is to detect younger stores for load operations of said threads and younger loads for store operations of said threads.