Bluetooth Packet Demodulation with Parallel CRC-Selected Paths
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Solution Overview
Problem
Conventional Bluetooth systems face challenges in achieving improved receive sensitivity due to the need for accurate modulation index estimation, especially with dirty packets where the modulation index changes quickly, limiting the effectiveness of maximum likelihood sequence estimation (MLSE) demodulators.
Innovation Solution
A communication system employing parallel processing of received signals using dual demodulator circuits, one configured for Gaussian frequency-shift keying (GFSK) in the frequency domain and the other using MLSE in the phase domain, with cyclic redundancy checks to select and transmit packets independently of modulation index uncertainty.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a GFSK demodulator uses MLSE algorithm to improve receive sensitivity, then sensitivity is improved, but accurate modulation index estimation is required which is difficult to achieve with dirty packets
Solution Approach 1:
The invention divides the demodulation process into two separate parallel paths: one using MLSE algorithm and another using conventional demodulation. Each path processes the signal independently, allowing the system to leverage the sensitivity improvement of MLSE without requiring accurate modulation index estimation for the entire process. The arbitration mechanism then selects the best result from either path.
Solution Approach 2:
An arbitration mechanism is introduced as an intermediary between the two demodulation paths and the final output. This arbitrator evaluates the results from both the MLSE path and the conventional demodulation path, and selects the more reliable result. This mediator allows the system to benefit from MLSE's sensitivity improvement while compensating for its vulnerability to modulation index estimation errors through the fallback conventional path.
2Reliability
If parallel processing with dual demodulator circuits is implemented to improve receive sensitivity, then sensitivity enhancement is achieved, but device complexity increases
Solution Approach 1:
The invention merges two different demodulation approaches (MLSE and conventional) into a single parallel processing architecture. By combining the strengths of both methods in one system and using an arbitration mechanism to select the best result, the invention achieves sensitivity improvement while managing complexity through shared signal processing infrastructure and selective operation of the two paths.
Data Source
AI summary
A communication system and method are disclosed for parallel processing of received signals to improve sensitivity of the system. Generally, the method includes demodulating a modulated signal in a first demodulator circuit and a second demodulator circuit in parallel. The first and second demodulated signals are then de-whitened, and a cyclic redundancy code (CRC) check performed on each. If the de-whitened first demodulated signal passes the CRC check a first packet included in the signal is sent to a central processing unit (CPU) for further processing. If the de-whitened second demodulated signal passes the CRC check, and the de-whitened first demodulated signal fails, a second packet included in the de-whitened second demodulated signal is transmitted to the CPU for further processing. In one embodiment, one of demodulator circuits is a GFSK demodulator operated in the phase domain and configured to use maximum likelihood sequence estimation. Other embodiments are also described.