Bluetooth Receiver Acquisition Using a Shared 1-Bit Correlator
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Solution Overview
Problem
Bluetooth receivers face challenges in achieving robust packet acquisition with minimal current consumption, as existing correlators are complex and consume significant power, leading to potential packet loss due to degraded timing estimation.
Innovation Solution
A simplified acquisition circuit using a 1-bit correlator shared for both access code and EDR synchronization sequence correlation computations, with a 4 MHz sampling rate and a SINC interpolator for improved timing resolution, supporting up to ±40 ppm timing offset and ±60 ppm frequency offset without sensitivity loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If a simplified 1-bit correlator is used, then current consumption and circuit complexity are reduced, but timing estimation accuracy and packet detection reliability may be degraded
Solution Approach 1:
The patent combines access code correlation and EDR synchronization sequence correlation into a single shared 1-bit correlator hardware unit. The correlator is configured to perform access code correlation first, then EDR sync sequence correlation, eliminating the need for separate hardware correlators for each function. This merging reduces overall circuit complexity and current consumption while maintaining the required timing estimation accuracy through sequential operation of the shared unit.
Solution Approach 2:
The 1-bit correlator is designed as a universal hardware unit that can perform multiple functions: access code correlation for packet acquisition and EDR synchronization sequence correlation for timing estimation. By making the correlator multi-functional rather than having dedicated correlators for each task, the patent reduces the total hardware footprint and power consumption while preserving the necessary measurement precision for both functions through proper configuration and sequencing.
2Device complexity
If a 1-bit correlator is used instead of an N-bit correlator, then circuit complexity and current consumption are reduced, but the amount of data buffered is reduced N times, potentially affecting correlation peak evaluation accuracy
Solution Approach 1:
The patent replaces traditional multi-bit correlator hardware with a 1-bit correlator system that uses phase differentiator outputs fed through M 1-bit switches. Instead of using complex N-bit correlator circuits with large data buffers, the invention substitutes a simpler 1-bit processing architecture that achieves equivalent correlation functionality through binary decision logic and sequential processing, thereby reducing circuit complexity while maintaining correlation peak evaluation accuracy.
3Device complexity
If the same correlator hardware is shared for both access code and EDR synchronization sequence correlation, then device complexity is reduced, but the correlator must be sequentially configured for different functions
Solution Approach 1:
The shared correlator hardware operates in periodic cycles, first performing access code correlation and then EDR synchronization sequence correlation in sequential phases. The correlator is periodically reconfigured between these two functions through control logic that switches its operation mode. This periodic action allows a single hardware unit to handle multiple correlation tasks, reducing overall device complexity while maintaining acceptable packet acquisition speed through efficient time-division multiplexing of the shared resource.
Data Source
AI summary
An acquisition scheme is provided for receiving a Bluetooth basic data rate (BDR) or enhanced data rate (EDR) packet. An acquisition apparatus for a Bluetooth receiver includes: a phase differentiator; a plurality of basic building blocks; a plurality of 1-bit switches; and a correlation computation equation. It features an acquisition circuit implementation with 1-bit correlator hardware shared by access code and EDR synchronization sequence correlation computations.


