BMC BIOS Flashing via Multiplexer Access Control
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Solution Overview
Problem
Efficiently upgrading BIOS software in computer systems remains a challenging task, as existing methods struggle with simultaneous access and management of BIOS memory by service processors or baseboard management controllers (BMCs) during the boot process.
Innovation Solution
A method involving a BMC with a first processor and memory, which creates partitions for both BMC and BIOS memory, uses a multiplexer to access BIOS memory when the host processor is not using it, and retrieves BIOS software from BMC memory to write it to BIOS memory, enabling remote BIOS flash upgrades.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If the service processor accesses the BIOS memory during the boot process, then the BIOS can be upgraded remotely, but the host processor cannot access the BIOS memory simultaneously causing access conflicts
Solution Approach 1:
The multiplexer dynamically switches the BIOS memory access rights between the service processor and host processor based on system state. During boot process, the service processor gains access to upgrade BIOS; after boot completes, access switches to the host processor. This dynamic allocation resolves the access conflict while enabling remote upgrade capability.
Solution Approach 2:
The multiplexer acts as an intermediary device that mediates access requests from both the service processor and host processor to the BIOS memory. It implements access control logic that grants exclusive access to the appropriate processor based on system state, preventing simultaneous access conflicts while enabling the service processor to perform remote BIOS upgrades.
2Adaptability or versatility
If the BIOS memory is made accessible to the service processor for flashing, then remote BIOS updates are enabled, but access conflicts arise with the host processor during boot
Solution Approach 1:
The system dynamically adjusts BIOS memory accessibility based on boot phase. During critical boot operations, the multiplexer ensures the host processor has exclusive access to maintain boot reliability. After boot completion, access dynamically shifts to allow the service processor to perform BIOS updates, thus achieving both reliability during boot and flexibility for updates.
Solution Approach 2:
The system performs preliminary checks through the multiplexer to determine whether the host processor has completed its boot sequence before allowing service processor access. This preliminary action ensures that BIOS memory access for updating only occurs after the host processor has reliably completed its critical operations, maintaining system boot reliability while enabling update flexibility.
3Ease of operation
If a multiplexer is used to control BIOS memory access, then access conflicts are resolved, but the system complexity increases
Solution Approach 1:
The multiplexer is configured with automatic access control logic that independently manages BIOS memory allocation between processors without requiring manual intervention. The system self-regulates access based on predefined conditions (boot state detection), simplifying operation while the added hardware complexity is minimized through integrated design.
Solution Approach 2:
The multiplexer serves multiple functions: it acts as a switch for BIOS memory access, implements access control logic, and provides system state monitoring. By consolidating these functions into a single component, the patent reduces overall system complexity compared to using separate control mechanisms for each function.
Data Source
AI summary
A method of flashing a BIOS memory of a computer system is described herein. The method includes executing a kernel of baseboard management controller (BMC) to create a partition for the BMC memory and a second partition for the BIOS memory; detecting whether the host processor is accessing the BIOS memory; controlling a multiplexer (MUX) to allow the first processor to access the BIOS memory when the host processor is not accessing the BIOS memory; and retrieving first BIOS software from the BMC memory and writing the first BIOS software to the BIOS memory.