BMC Firmware Upgrade via Coprocessor Bus Handover
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Solution Overview
Problem
The effective utilization of coprocessors in multi-processor BMCs, such as the AST2600, is inadequate, leading to overburdening of the main processor with tasks like firmware upgrades, which results in poor overall performance.
Innovation Solution
A firmware upgrading method that utilizes inter-core communication between the main processor and coprocessor, where the coprocessor takes over bus control rights and performs firmware upgrades, leveraging a real-time operating system to enhance efficiency and share tasks with the main processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the main processor performs firmware upgrades alone, then the firmware upgrade function is reliable, but the main processor workload increases and overall BMC performance deteriorates
Solution Approach 1:
The patent divides the firmware upgrade task between two processors: the main processor handles firmware reception, validation, and coordination (reliability functions), while the coprocessor performs the actual firmware writing to hardware components (execution function). This segmentation allows each processor to specialize in specific tasks, maintaining reliability while improving overall system performance and resource utilization.
2Productivity
If the coprocessor is used for firmware upgrades, then the main processor workload decreases and BMC performance improves, but the system requires complex inter-core communication mechanisms
Solution Approach 1:
The patent introduces a shared memory region as an intermediary between the main processor and coprocessor. The main processor writes upgrade parameters and firmware data to this shared memory, then triggers the coprocessor to execute. This intermediary mechanism simplifies inter-core communication by providing a standardized data exchange interface, reducing the complexity of direct processor-to-processor communication while enabling effective task distribution.
3Productivity
If the coprocessor takes over bus control rights, then the firmware upgrade efficiency increases, but the bus control transition requires additional messaging protocols
Solution Approach 1:
The patent implements a preliminary action mechanism where the main processor prepares all necessary upgrade data and parameters in shared memory before transferring bus control rights to the coprocessor. The coprocessor receives a trigger message that includes pre-configured upgrade information, allowing it to immediately begin the firmware writing operation without requiring complex run-time negotiation protocols. This preliminary preparation simplifies the bus control transition while maintaining high upgrade efficiency.
Data Source
AI summary
The present application discloses a firmware upgrading method and apparatus, a BMC, a server and a medium. The method includes: powering on a coprocessor, loading same with a coprocessor system, and initializing inter-core communication with a main processor; powering on the main processor and loading same with a main processor system, and releasing a bus control right by means of loading a bus driver; the main processor sending a bus control right release message to the coprocessor, in response to the bus control right release message, the coprocessor taking over the bus control right; the main processor sending new firmware and a firmware upgrading message to the coprocessor; and, in response to the firmware upgrading message, the coprocessor writing the new firmware into a corresponding server hardware component by means of a bus, so as to upgrade firmware of the server hardware component.