BMC Reset Hold Control During PFR Firmware Update
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Solution Overview
Problem
Memory access contention between a baseboard management controller (BMC) and a platform firmware resilience (PFR) during firmware update can cause operational failures in computer systems due to rebooting by the BMC during PFR's integrity check, leading to contention over access to the firmware memory.
Innovation Solution
A control device with a reset state continuation unit and a reset state release unit is employed to manage the BMC's reset state, ensuring it remains in a reset state until the PFR completes firmware writing and authentication, thereby avoiding access contention by detecting the BMC's reset operation and the completion of firmware operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the BMC performs self-reboot to detect operation abnormality, then the BMC can recover from faults, but memory access contention occurs with the PFR during firmware updates
Solution Approach 1:
The control device detects the reset operation of the BMC in advance and extends the reset state duration until the PFR completes its firmware writing operation. This preliminary detection and extension prevents the BMC from accessing memory during the critical firmware update period, avoiding access contention while maintaining the BMC's fault recovery capability through subsequent automatic reboot
Solution Approach 2:
The control device acts as an intermediary between the BMC and the PFR, managing the reset state transitions. It detects both the BMC's reset operation and the PFR's firmware writing completion, then appropriately extends or releases the reset state to coordinate their operations and prevent memory access conflicts
2Productivity
If the BMC reboots itself during PFR firmware integrity check, then the BMC can update firmware, but operational failure occurs due to access contention
Solution Approach 1:
The control device implements a feedback mechanism by detecting the completion of the PFR's firmware writing operation and using this information to release the BMC's reset state. This feedback-based control ensures that the BMC only exits reset and accesses memory after the PFR has finished updating the firmware, preventing access contention while maintaining efficient firmware updates
Solution Approach 2:
The control device extends the reset state as a preliminary measure to block BMC memory access during the entire firmware writing process. This preliminary action ensures that no access contention occurs during the critical update period, while still allowing the BMC to resume normal operations with the updated firmware afterward
Data Source
AI summary
A control device includes a reset state continuation unit and a reset state release unit. The reset state continuation unit that, continues a state of the reset of the controller, in response to detection of an operation of the reset by the controller for the controller itself, the controller performing a process of controlling hardware by executing firmware stored in a first memory. The reset state release unit that releases the state of the reset in response to detection of completion of an operation of writing an updated version of the firmware into the first memory by a management unit that manages the firmware.