BMD Nucleation and Growth for Gettering in Bulk Silicon Wafers
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Solution Overview
Problem
Ultra deep submicron semiconductor process flows have insufficient thermal budget for effective nucleation and growth of bulk micro defects (BMDs) necessary for efficient gettering of heavy metal contaminants, leading to poor yield and reliability issues due to trapped metal ions in integrated circuits.
Innovation Solution
Optimized BMD nucleation and growth steps are performed early in the semiconductor manufacturing flow, incorporating additional anneals at specific temperatures and times to achieve a sufficient concentration and size of BMDs for effective gettering, avoiding dopant degradation and integrating these steps with the STI pad oxidation process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional thermal budget is provided for BMD nucleation and growth, then gettering efficiency is improved, but dopant diffusion increases causing transistor performance degradation
Solution Approach 1:
The patent performs BMD nucleation and growth anneals early in the manufacturing flow, before dopant implantation steps. This preliminary action allows sufficient time for BMD formation without exposing the dopants to high temperatures that would cause unwanted diffusion, thus resolving the contradiction between achieving effective gettering and maintaining transistor performance
Solution Approach 2:
The patent divides the thermal processing into multiple separate anneal steps (nucleation anneal and growth anneal) performed at different times in the process flow. This segmentation allows each step to be optimized independently - the nucleation step creates BMDs early when dopants are not yet present, and the growth step develops them further without causing dopant degradation
2Manufacturing precision
If thermal budget is reduced in ultra deep submicron processes, then transistor performance is maintained, but BMD nucleation and growth are insufficient for effective gettering
Solution Approach 1:
The patent performs BMD nucleation and growth anneals early in the manufacturing flow, before dopant implantation steps. This preliminary action allows sufficient time for BMD formation without exposing the dopants to high temperatures that would cause unwanted diffusion, thus resolving the contradiction between achieving effective gettering and maintaining transistor performance
Solution Approach 2:
The patent modifies the thermal processing parameters by introducing dedicated nucleation and growth anneals with specific temperature and time parameters early in the process flow. These parameter changes enable sufficient BMD development within the constrained thermal budget of ultra deep submicron processes while maintaining transistor performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances gettering efficiency, significantly improving wafer yield by ensuring heavy metal ions are trapped, preventing gate dielectric failures and diode leakage, while maintaining transistor performance and avoiding short channel effects.
Implementation Method 1
Heavy metal atoms diffuse to and get trapped (gettered) by the BMDs
Implementation Method 2
Heavy metal atoms diffuse to and get trapped (gettered) by the BMDs thus removing them from regions where they may cause harm
Implementation Method 3
BMD's nucleate and grow during thermal steps in integrated circuit process flows
Data Source
AI summary
A method of nucleating and growing oxygen precipitates during a pad oxidation process. The nucleating is performed during in the oxidation furnace prior to the pad oxide growth. At least a portion of the growth of the oxygen precipitates occurs during the pad oxide growth. The oxygen precipitates are of sufficient concentration and size in lightly doped p-type wafers for effective gettering of heavy metals is deep submicron transistor, integrated circuit manufacturing flows.