Board Assembly Testing Using Processor and Memory Test Cards

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Solution Overview

Problem

Current methods for testing printed board assemblies (PBAs) require the availability of fully developed and manufactured components like CPUs, memory cards, and PCIe cards, which delays early identification of faults in the board assembly during the design cycle.

Innovation Solution

The use of processor test boards and memory/test cards with PRBS generators to simulate communication and test signal integrity between connectors, allowing for early functional testing of the board assembly before the actual components are available.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If actual components (CPUs, memory, peripherals) are used for testing, then functional testing accuracy is improved, but testing can only be performed after components are fully developed and manufactured, delaying fault identification

Engineering Contradiction:
Improvefunctional testing accuracyVSAvoiddesign cycle time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent uses test cards as simplified copies of actual components (CPUs, memory, peripherals). These test cards replicate the essential electrical and logical functions needed for board-level testing without requiring the full functionality of the actual components. This allows functional testing of the board assembly to proceed with approximate copies rather than waiting for the real components.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent enables preliminary testing of the board assembly using test cards before the actual components are available. By performing testing actions in advance with substitute components, the board assembly can be validated early in the design cycle, identifying faults before final component integration occurs.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If test cards are used for early testing, then design cycle time is reduced, but testing complexity and device setup requirements increase

Engineering Contradiction:
Improvedesign cycle timeVSAvoidtesting setup complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent divides the testing function into separate, modular test cards that can be independently designed and manufactured for different component types (CPU test card, memory test card, peripheral test card). Each test card handles a specific testing function, allowing the overall testing system to be built from simple, discrete units rather than requiring a complex integrated testing system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces test cards as intermediary devices between the board assembly under test and the actual components that will eventually be installed. These intermediaries provide the necessary testing capability without requiring the presence of the final components, simplifying the early testing setup while still enabling meaningful functional validation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10175296B2Testing a board assembly using test cards
Publication Date: 2019.01.08 INTEL CORP
  • US10175296B2 patent drawing
  • US10175296B2 patent drawing
  • US10175296B2 patent drawing

AI summary

A testing arrangement is provided which comprises: a board assembly comprising (i) a first connector configured to receive a first component while the board assembly is to operate in a regular mode of operation and (ii) a second connector configured to receive a second component while the board assembly is to operate in the regular mode of operation; a first test card configured to be attached to the first connector while the board assembly is to operate in a test mode of operation; and a second test card configured to be attached to the second connector while the board assembly is to operate in the test mode of operation, wherein while the board assembly is to operate in the test mode of operation, the first test card is configured to communicate with the second test card to facilitate testing of the board assembly.