Body-Biased Cascode Current Source for Compact Error Amplifiers
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Solution Overview
Problem
The challenge in designing error amplifiers for power management integrated circuits (PMICs) is to achieve stable performance with reduced transistor size, as larger transistors increase parasite components, affect speed, and hinder miniaturization efforts in portable electronic devices.
Innovation Solution
The implementation of a cascode current source using body biasing, which involves PMOS transistors receiving body voltages to provide a stable current source, allowing for a smaller transistor size while maintaining performance, and incorporating a cascode connection structure to enhance current mirroring and reduce overall area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the transistor size is increased to reduce manufacturing errors, then manufacturing precision is improved, but area occupied increases and parasite components increase
Solution Approach 1:
The patent applies body biasing to dynamically adjust the threshold voltage of PMOS transistors, changing the electrical parameters to compensate for manufacturing variations. By controlling the body voltage, the circuit achieves stable performance without requiring oversized transistors, thus maintaining manufacturing precision while minimizing area occupation.
2Manufacturing precision
If the transistor size is increased to reduce manufacturing errors, then manufacturing precision is improved, but speed decreases due to increased capacitance
Solution Approach 1:
The body biasing technique dynamically adjusts the threshold voltage parameter of the PMOS transistors, enabling the circuit to achieve stable operation with smaller transistor sizes. This parameter adjustment compensates for manufacturing variations without requiring large device dimensions, thereby maintaining both manufacturing precision and high circuit speed by minimizing parasitic capacitance.
3Area of moving object
If the transistor size is reduced for miniaturization, then area occupied is reduced, but leakage current increases
Solution Approach 1:
The patent utilizes body biasing to dynamically control the threshold voltage of PMOS transistors, adjusting the electrical parameters to minimize leakage current in small-sized devices. By optimizing the body voltage, the circuit achieves stable operation with reduced transistor area while suppressing subthreshold leakage and other harmful effects associated with miniaturization.
4Area of moving object
If the transistor size is reduced for miniaturization, then area occupied is reduced, but manufacturing errors increase
Solution Approach 1:
The body biasing technique dynamically adjusts the threshold voltage parameter to compensate for manufacturing variations in small-sized PMOS transistors. By controlling the body voltage, the circuit achieves stable performance despite process variations, enabling miniaturization without sacrificing manufacturing precision. The parameter adjustment effectively compensates for dimensional variations and other manufacturing errors.
Data Source
AI summary
Provided is an error amplifier. The error amplifier includes: an amplifying unit receiving first and second input signals and amplifying a voltage difference between the received first and second input signals; a first voltage generating unit generating first and second driving voltages for driving the amplifying unit; a second voltage generating unit generating first and second body voltages to implement a body biasing method; a cascode current source including first to fourth PMOS transistors to provide a bias current to the amplifying unit and the first voltage generating unit; and an output unit outputting a signal of the voltage difference amplified by the amplifying unit, wherein the first and third PMOS transistors receive the first body voltage through a body terminal and the second and fourth PMOS transistors receive the second body voltage through a body terminal.