Bond Pad Layout for Thin Shingled Die Stacks Under Bending

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Solution Overview

Problem

Existing semiconductor devices with shingled stacks of semiconductor dies face failure due to bending stresses during manufacturing, necessitating thick substrates to meet industry standards, limiting the ability to increase memory capacity or reduce package size.

Innovation Solution

A shingled arrangement of semiconductor dies with bond pads oriented perpendicular to the slits, allowing for thinner substrates (≤40 μm) and reduced bending stresses, enabling multiple dies to be stacked while maintaining a high success rate in bending tests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the substrate thickness is increased to meet bending test standards, then reliability is improved, but the package size increases and memory capacity is limited

Engineering Contradiction:
Improvebending test success rateVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent inverts the conventional approach by orienting bond pads perpendicular to slits rather than parallel to them. This reversal of the standard layout orientation changes the stress distribution pattern during bending, allowing thinner substrates to withstand the same bending forces while maintaining reliability.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the geometric parameter of bond pad orientation from parallel to perpendicular relative to slits. This parameter change fundamentally alters the mechanical behavior of the substrate under bending stress, enabling the use of thinner materials while meeting reliability standards.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If additional semiconductor dies are added to increase memory capacity, then memory capacity is improved, but the package size increases

Engineering Contradiction:
Improvenumber of semiconductor diesVSAvoidpackage size
Core Design Contradiction:
Quantity of substanceVSVolume of moving object

Solution Approach 1:

The patent utilizes the perpendicular dimension relative to slits for bond pad placement, creating an additional design dimension. This allows for more efficient spatial arrangement of multiple semiconductor dies, enabling increased memory capacity without proportionally increasing package size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If the substrate thickness is reduced to enable more dies per package, then productivity is improved, but reliability deteriorates due to bending stresses

Engineering Contradiction:
Improvenumber of dies per packageVSAvoidbending test success rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By inverting the bond pad orientation from the conventional parallel-to-slits arrangement to perpendicular-to-slits, the patent fundamentally changes how bending stresses are distributed across the substrate. This inversion allows thin substrates to maintain structural integrity during bending tests.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

Changing the bond pad orientation parameter from parallel to perpendicular relative to slits creates a new mechanical stress distribution pattern that is more favorable for thin substrates, enabling both reduced thickness and maintained reliability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250210581A1Bond pad connection layout
Publication Date: 2025.06.26 LODESTAR LICENSING GROUP LLC
  • US20250210581A1 patent drawing
  • US20250210581A1 patent drawing
  • US20250210581A1 patent drawing

AI summary

A memory device includes a package substrate and at least one stack of a plurality of semiconductor dies disposed on the package substrate. The plurality of semiconductor dies can be stacked in a shingled configuration. Each semiconductor die includes a plurality of slits disposed in a first direction. An offset direction defining the shingled arrangement is in-line with the first direction. Each semiconductor die can include a die substrate and a plurality of memory planes disposed on the die substrate with each memory plane having a memory cell array. Each slit can divide and separate each memory plane into at least one of logic blocks or sub-logic blocks. The semiconductor die can include a plurality of bond pads linearly aligned in a second direction that is perpendicular to the first direction.