Heterogeneous Bond Pad Structure for CMP Dishing Compensation
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Solution Overview
Problem
Wafer-to-wafer bonding technologies face challenges in achieving co-planarity of bonding surfaces due to dishing problems during Chemical Mechanical Polish (CMP) processes, leading to non-planar surfaces and reduced bonding quality.
Innovation Solution
The implementation of a fill-in conductive layer on metal pads to fill recesses and ensure co-planarity, using a selective deposition method to match the Coefficient of Thermal Expansion (CTE) and melting point of the fill-in metal with the bond pads, facilitating better bonding through hybrid bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CMP process is used to planarize wafer surfaces, then surface flatness is improved, but dishing problems occur causing non-planar bonding surfaces
Solution Approach 1:
The patent applies preliminary action by forming fill-in conductive layers on metal pads before the bonding process. These fill-in layers pre-compensate for the dishing凹陷 in metal pads, ensuring that after CMP planarization, the metal pad surfaces remain coplanar with dielectric layer surfaces, thus resolving the bonding surface planarity issue caused by CMP dishing
2Strength
If metal pads are made larger to ensure bonding area, then bonding strength is improved, but co-planarity with dielectric surfaces becomes more difficult to achieve
Solution Approach 1:
The patent applies local quality by making the fill-in conductive layers selective to metal pads only, not dielectric surfaces. This localized approach allows metal pads to have different properties (elevated height, matching CTE) compared to dielectric surfaces, enabling both large bonding area and co-planarity to be achieved simultaneously
3Adaptability or versatility
If different metal materials are used for metal pads and bond pads, then functional requirements are met, but thermal expansion mismatch causes bonding reliability issues
Solution Approach 1:
The patent applies parameter changes by selecting fill-in conductive layer materials with specific properties: CTE matching the metal pads and melting points suitable for the bonding process. This parameter matching ensures thermal expansion compatibility during bonding, preventing reliability issues while allowing functional metal material selection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances bonding quality by achieving co-planarity and reducing thermal expansion mismatch issues, resulting in improved bonding strength and stability.
Implementation Method 1
A fill-in conductive layer is selectively deposited on the metal pads
Implementation Method 2
In the hybrid bonding, the metal pads of two wafers are bonded to each other through direct metal-to-metal bonding, and an oxide surface of one of the two wafers is bonded to an oxide surface or a silicon surface of the other wafer
Implementation Method 3
The CMP processes, however, suffer from dishing problems
Data Source
AI summary
A method includes forming a first package component, which formation process includes forming a first plurality of openings in a first dielectric layer, depositing a first metallic material into the first plurality of openings, performing a planarization process on the first metallic material and the first dielectric layer to form a plurality of metal pads in the first dielectric layer, and selectively depositing a second metallic material on the plurality of metal pads to form a plurality of bond pads. The first plurality of bond pads comprise the plurality of metal pads and corresponding parts of the second metallic material. The first package component is bonded to a second package component.