Interconnected Bond Pads Reduce Inductance in IC Power Delivery

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Solution Overview

Problem

Integrated circuit device performance is limited by signal integrity issues, particularly due to switching noise caused by simultaneous switching of output driver circuits, which restricts operating clock frequency and reduces performance.

Innovation Solution

Reducing inductance in supply voltage or ground nets by electrically interconnecting supply voltage or ground bond pads, bond fingers, and solder balls to create parallel connections, thereby decreasing overall inductance and switching noise, and allowing for increased operating clock frequency without increasing manufacturing resources or costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If inductance in supply voltage or ground nets is reduced by electrically interconnecting bond pads, bond fingers, and solder balls, then signal integrity is improved and operating clock frequency can be increased, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple supply voltage bond pads, bond fingers, and solder balls into electrically interconnected networks. By combining these previously separate elements into unified conductive structures, the overall inductance is reduced while maintaining signal integrity and enabling higher operating frequencies without proportionally increasing device complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the supply voltage and ground connections into multiple parallel paths through bond pads, bond fingers, and solder balls. This segmentation creates multiple current pathways that reduce overall inductance, as the parallel configuration lowers the equivalent inductance compared to a single connection path

Inventive Principle:
Principle #1Segmentation

2Productivity

If operating clock frequency is increased to improve device performance, then productivity is improved, but signal integrity deteriorates due to switching noise

Engineering Contradiction:
Improvedevice performanceVSAvoidsignal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the electrical parameters of the power delivery network by reducing inductance through interconnected bond pads, bond fingers, and solder balls. This parameter change allows the system to operate at higher clock frequencies without exceeding noise thresholds, thereby improving productivity while maintaining signal integrity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8860496B2Methods for receiving and transmitting voltage through the use of supply voltage or ground connections including bond pad interconnects for integrated circuit devices
Publication Date: 2014.10.14 MICRON TECHNOLOGY INC
  • US8860496B2 patent drawing
  • US8860496B2 patent drawing
  • US8860496B2 patent drawing

AI summary

Embodiments disclosed herein may relate to supply voltage or ground connections for integrated circuit devices. As one example, two or more supply voltage bond pads on an integrated circuit die may be connected together via one or more electrically conductive interconnects.